Lines Matching refs:DMA_CTL0_BITS_PER_CH
26 #define DMA_CTL0_BITS_PER_CH 4 macro
213 (DMA_CTL0_BITS_PER_CH * chan->chan_id); in pdc_set_dir()
215 (DMA_CTL0_BITS_PER_CH * chan->chan_id)); in pdc_set_dir()
218 val |= 0x1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id + in pdc_set_dir()
221 val &= ~(0x1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id + in pdc_set_dir()
231 (DMA_CTL0_BITS_PER_CH * ch); in pdc_set_dir()
233 (DMA_CTL0_BITS_PER_CH * ch)); in pdc_set_dir()
236 val |= 0x1 << (DMA_CTL0_BITS_PER_CH * ch + in pdc_set_dir()
239 val &= ~(0x1 << (DMA_CTL0_BITS_PER_CH * ch + in pdc_set_dir()
258 (DMA_CTL0_BITS_PER_CH * chan->chan_id)); in pdc_set_mode()
259 mask_dir = 1 << (DMA_CTL0_BITS_PER_CH * chan->chan_id +\ in pdc_set_mode()
263 val |= mode << (DMA_CTL0_BITS_PER_CH * chan->chan_id); in pdc_set_mode()
269 (DMA_CTL0_BITS_PER_CH * ch)); in pdc_set_mode()
270 mask_dir = 1 << (DMA_CTL0_BITS_PER_CH * ch +\ in pdc_set_mode()
274 val |= mode << (DMA_CTL0_BITS_PER_CH * ch); in pdc_set_mode()