Lines Matching refs:TDCR
31 #define TDCR 0x40 /* Control */ macro
146 writel(readl(tdmac->reg_base + TDCR) | TDCR_FETCHND, in mmp_tdma_chan_set_desc()
147 tdmac->reg_base + TDCR); in mmp_tdma_chan_set_desc()
161 writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN, in mmp_tdma_enable_chan()
162 tdmac->reg_base + TDCR); in mmp_tdma_enable_chan()
171 tdcr = readl(tdmac->reg_base + TDCR); in mmp_tdma_disable_chan()
174 writel(tdcr, tdmac->reg_base + TDCR); in mmp_tdma_disable_chan()
185 writel(readl(tdmac->reg_base + TDCR) | TDCR_CHANEN, in mmp_tdma_resume_chan()
186 tdmac->reg_base + TDCR); in mmp_tdma_resume_chan()
196 writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN, in mmp_tdma_pause_chan()
197 tdmac->reg_base + TDCR); in mmp_tdma_pause_chan()
284 writel(tdcr, tdmac->reg_base + TDCR); in mmp_tdma_config_chan()