Lines Matching +full:phy +full:- +full:device
1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
15 #include <linux/device.h>
33 #define DCSR_NODESC BIT(30) /* No-Descriptor Fetch (read / write) */
35 #define DCSR_REQPEND BIT(8) /* Request Pending (read-only) */
36 #define DCSR_STOPSTATE BIT(3) /* Stop State (read-only) */
62 #define DCMD_ENDIAN BIT(18) /* Device Endian-ness. */
69 #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
90 struct device *dev;
93 struct mmp_pdma_phy *phy; member
125 struct device *dev;
126 struct dma_device device; member
127 struct mmp_pdma_phy *phy; member
128 spinlock_t phy_lock; /* protect alloc/free phy channels */
138 container_of(dmadev, struct mmp_pdma_device, device)
144 static void set_desc(struct mmp_pdma_phy *phy, dma_addr_t addr) in set_desc() argument
146 u32 reg = (phy->idx << 4) + DDADR; in set_desc()
148 writel(addr, phy->base + reg); in set_desc()
151 static void enable_chan(struct mmp_pdma_phy *phy) in enable_chan() argument
155 if (!phy->vchan) in enable_chan()
158 reg = DRCMR(phy->vchan->drcmr); in enable_chan()
159 writel(DRCMR_MAPVLD | phy->idx, phy->base + reg); in enable_chan()
161 dalgn = readl(phy->base + DALGN); in enable_chan()
162 if (phy->vchan->byte_align) in enable_chan()
163 dalgn |= 1 << phy->idx; in enable_chan()
165 dalgn &= ~(1 << phy->idx); in enable_chan()
166 writel(dalgn, phy->base + DALGN); in enable_chan()
168 reg = (phy->idx << 2) + DCSR; in enable_chan()
169 writel(readl(phy->base + reg) | DCSR_RUN, phy->base + reg); in enable_chan()
172 static void disable_chan(struct mmp_pdma_phy *phy) in disable_chan() argument
176 if (!phy) in disable_chan()
179 reg = (phy->idx << 2) + DCSR; in disable_chan()
180 writel(readl(phy->base + reg) & ~DCSR_RUN, phy->base + reg); in disable_chan()
183 static int clear_chan_irq(struct mmp_pdma_phy *phy) in clear_chan_irq() argument
186 u32 dint = readl(phy->base + DINT); in clear_chan_irq()
187 u32 reg = (phy->idx << 2) + DCSR; in clear_chan_irq()
189 if (!(dint & BIT(phy->idx))) in clear_chan_irq()
190 return -EAGAIN; in clear_chan_irq()
193 dcsr = readl(phy->base + reg); in clear_chan_irq()
194 writel(dcsr, phy->base + reg); in clear_chan_irq()
195 if ((dcsr & DCSR_BUSERR) && (phy->vchan)) in clear_chan_irq()
196 dev_warn(phy->vchan->dev, "DCSR_BUSERR\n"); in clear_chan_irq()
203 struct mmp_pdma_phy *phy = dev_id; in mmp_pdma_chan_handler() local
205 if (clear_chan_irq(phy) != 0) in mmp_pdma_chan_handler()
208 tasklet_schedule(&phy->vchan->tasklet); in mmp_pdma_chan_handler()
215 struct mmp_pdma_phy *phy; in mmp_pdma_int_handler() local
216 u32 dint = readl(pdev->base + DINT); in mmp_pdma_int_handler()
223 if (i >= pdev->dma_channels) in mmp_pdma_int_handler()
225 dint &= (dint - 1); in mmp_pdma_int_handler()
226 phy = &pdev->phy[i]; in mmp_pdma_int_handler()
227 ret = mmp_pdma_chan_handler(irq, phy); in mmp_pdma_int_handler()
238 /* lookup free phy channel as descending priority */
242 struct mmp_pdma_device *pdev = to_mmp_pdma_dev(pchan->chan.device); in lookup_phy()
243 struct mmp_pdma_phy *phy, *found = NULL; in lookup_phy() local
248 * ch 0 - 3, 16 - 19 <--> (0) in lookup_phy()
249 * ch 4 - 7, 20 - 23 <--> (1) in lookup_phy()
250 * ch 8 - 11, 24 - 27 <--> (2) in lookup_phy()
251 * ch 12 - 15, 28 - 31 <--> (3) in lookup_phy()
254 spin_lock_irqsave(&pdev->phy_lock, flags); in lookup_phy()
255 for (prio = 0; prio <= ((pdev->dma_channels - 1) & 0xf) >> 2; prio++) { in lookup_phy()
256 for (i = 0; i < pdev->dma_channels; i++) { in lookup_phy()
259 phy = &pdev->phy[i]; in lookup_phy()
260 if (!phy->vchan) { in lookup_phy()
261 phy->vchan = pchan; in lookup_phy()
262 found = phy; in lookup_phy()
269 spin_unlock_irqrestore(&pdev->phy_lock, flags); in lookup_phy()
275 struct mmp_pdma_device *pdev = to_mmp_pdma_dev(pchan->chan.device); in mmp_pdma_free_phy()
279 if (!pchan->phy) in mmp_pdma_free_phy()
283 reg = DRCMR(pchan->drcmr); in mmp_pdma_free_phy()
284 writel(0, pchan->phy->base + reg); in mmp_pdma_free_phy()
286 spin_lock_irqsave(&pdev->phy_lock, flags); in mmp_pdma_free_phy()
287 pchan->phy->vchan = NULL; in mmp_pdma_free_phy()
288 pchan->phy = NULL; in mmp_pdma_free_phy()
289 spin_unlock_irqrestore(&pdev->phy_lock, flags); in mmp_pdma_free_phy()
293 * start_pending_queue - transfer any pending transactions
301 if (!chan->idle) { in start_pending_queue()
302 dev_dbg(chan->dev, "DMA controller still busy\n"); in start_pending_queue()
306 if (list_empty(&chan->chain_pending)) { in start_pending_queue()
307 /* chance to re-fetch phy channel with higher prio */ in start_pending_queue()
309 dev_dbg(chan->dev, "no pending list\n"); in start_pending_queue()
313 if (!chan->phy) { in start_pending_queue()
314 chan->phy = lookup_phy(chan); in start_pending_queue()
315 if (!chan->phy) { in start_pending_queue()
316 dev_dbg(chan->dev, "no free dma channel\n"); in start_pending_queue()
322 * pending -> running in start_pending_queue()
325 desc = list_first_entry(&chan->chain_pending, in start_pending_queue()
327 list_splice_tail_init(&chan->chain_pending, &chan->chain_running); in start_pending_queue()
333 set_desc(chan->phy, desc->async_tx.phys); in start_pending_queue()
334 enable_chan(chan->phy); in start_pending_queue()
335 chan->idle = false; in start_pending_queue()
339 /* desc->tx_list ==> pending list */
342 struct mmp_pdma_chan *chan = to_mmp_pdma_chan(tx->chan); in mmp_pdma_tx_submit()
346 dma_cookie_t cookie = -EBUSY; in mmp_pdma_tx_submit()
348 spin_lock_irqsave(&chan->desc_lock, flags); in mmp_pdma_tx_submit()
350 list_for_each_entry(child, &desc->tx_list, node) { in mmp_pdma_tx_submit()
351 cookie = dma_cookie_assign(&child->async_tx); in mmp_pdma_tx_submit()
354 /* softly link to pending list - desc->tx_list ==> pending list */ in mmp_pdma_tx_submit()
355 list_splice_tail_init(&desc->tx_list, &chan->chain_pending); in mmp_pdma_tx_submit()
357 spin_unlock_irqrestore(&chan->desc_lock, flags); in mmp_pdma_tx_submit()
368 desc = dma_pool_zalloc(chan->desc_pool, GFP_ATOMIC, &pdesc); in mmp_pdma_alloc_descriptor()
370 dev_err(chan->dev, "out of memory for link descriptor\n"); in mmp_pdma_alloc_descriptor()
374 INIT_LIST_HEAD(&desc->tx_list); in mmp_pdma_alloc_descriptor()
375 dma_async_tx_descriptor_init(&desc->async_tx, &chan->chan); in mmp_pdma_alloc_descriptor()
377 desc->async_tx.tx_submit = mmp_pdma_tx_submit; in mmp_pdma_alloc_descriptor()
378 desc->async_tx.phys = pdesc; in mmp_pdma_alloc_descriptor()
384 * mmp_pdma_alloc_chan_resources - Allocate resources for DMA channel.
388 * Return - The number of allocated descriptors.
395 if (chan->desc_pool) in mmp_pdma_alloc_chan_resources()
398 chan->desc_pool = dma_pool_create(dev_name(&dchan->dev->device), in mmp_pdma_alloc_chan_resources()
399 chan->dev, in mmp_pdma_alloc_chan_resources()
403 if (!chan->desc_pool) { in mmp_pdma_alloc_chan_resources()
404 dev_err(chan->dev, "unable to allocate descriptor pool\n"); in mmp_pdma_alloc_chan_resources()
405 return -ENOMEM; in mmp_pdma_alloc_chan_resources()
409 chan->idle = true; in mmp_pdma_alloc_chan_resources()
410 chan->dev_addr = 0; in mmp_pdma_alloc_chan_resources()
420 list_del(&desc->node); in mmp_pdma_free_desc_list()
421 dma_pool_free(chan->desc_pool, desc, desc->async_tx.phys); in mmp_pdma_free_desc_list()
430 spin_lock_irqsave(&chan->desc_lock, flags); in mmp_pdma_free_chan_resources()
431 mmp_pdma_free_desc_list(chan, &chan->chain_pending); in mmp_pdma_free_chan_resources()
432 mmp_pdma_free_desc_list(chan, &chan->chain_running); in mmp_pdma_free_chan_resources()
433 spin_unlock_irqrestore(&chan->desc_lock, flags); in mmp_pdma_free_chan_resources()
435 dma_pool_destroy(chan->desc_pool); in mmp_pdma_free_chan_resources()
436 chan->desc_pool = NULL; in mmp_pdma_free_chan_resources()
437 chan->idle = true; in mmp_pdma_free_chan_resources()
438 chan->dev_addr = 0; in mmp_pdma_free_chan_resources()
459 chan->byte_align = false; in mmp_pdma_prep_memcpy()
461 if (!chan->dir) { in mmp_pdma_prep_memcpy()
462 chan->dir = DMA_MEM_TO_MEM; in mmp_pdma_prep_memcpy()
463 chan->dcmd = DCMD_INCTRGADDR | DCMD_INCSRCADDR; in mmp_pdma_prep_memcpy()
464 chan->dcmd |= DCMD_BURST32; in mmp_pdma_prep_memcpy()
471 dev_err(chan->dev, "no memory for desc\n"); in mmp_pdma_prep_memcpy()
477 chan->byte_align = true; in mmp_pdma_prep_memcpy()
479 new->desc.dcmd = chan->dcmd | (DCMD_LENGTH & copy); in mmp_pdma_prep_memcpy()
480 new->desc.dsadr = dma_src; in mmp_pdma_prep_memcpy()
481 new->desc.dtadr = dma_dst; in mmp_pdma_prep_memcpy()
486 prev->desc.ddadr = new->async_tx.phys; in mmp_pdma_prep_memcpy()
488 new->async_tx.cookie = 0; in mmp_pdma_prep_memcpy()
489 async_tx_ack(&new->async_tx); in mmp_pdma_prep_memcpy()
492 len -= copy; in mmp_pdma_prep_memcpy()
494 if (chan->dir == DMA_MEM_TO_DEV) { in mmp_pdma_prep_memcpy()
496 } else if (chan->dir == DMA_DEV_TO_MEM) { in mmp_pdma_prep_memcpy()
498 } else if (chan->dir == DMA_MEM_TO_MEM) { in mmp_pdma_prep_memcpy()
504 list_add_tail(&new->node, &first->tx_list); in mmp_pdma_prep_memcpy()
507 first->async_tx.flags = flags; /* client is in control of this ack */ in mmp_pdma_prep_memcpy()
508 first->async_tx.cookie = -EBUSY; in mmp_pdma_prep_memcpy()
511 new->desc.ddadr = DDADR_STOP; in mmp_pdma_prep_memcpy()
512 new->desc.dcmd |= DCMD_ENDIRQEN; in mmp_pdma_prep_memcpy()
514 chan->cyclic_first = NULL; in mmp_pdma_prep_memcpy()
516 return &first->async_tx; in mmp_pdma_prep_memcpy()
520 mmp_pdma_free_desc_list(chan, &first->tx_list); in mmp_pdma_prep_memcpy()
539 chan->byte_align = false; in mmp_pdma_prep_slave_sg()
541 mmp_pdma_config_write(dchan, &chan->slave_config, dir); in mmp_pdma_prep_slave_sg()
550 chan->byte_align = true; in mmp_pdma_prep_slave_sg()
555 dev_err(chan->dev, "no memory for desc\n"); in mmp_pdma_prep_slave_sg()
559 new->desc.dcmd = chan->dcmd | (DCMD_LENGTH & len); in mmp_pdma_prep_slave_sg()
561 new->desc.dsadr = addr; in mmp_pdma_prep_slave_sg()
562 new->desc.dtadr = chan->dev_addr; in mmp_pdma_prep_slave_sg()
564 new->desc.dsadr = chan->dev_addr; in mmp_pdma_prep_slave_sg()
565 new->desc.dtadr = addr; in mmp_pdma_prep_slave_sg()
571 prev->desc.ddadr = new->async_tx.phys; in mmp_pdma_prep_slave_sg()
573 new->async_tx.cookie = 0; in mmp_pdma_prep_slave_sg()
574 async_tx_ack(&new->async_tx); in mmp_pdma_prep_slave_sg()
578 list_add_tail(&new->node, &first->tx_list); in mmp_pdma_prep_slave_sg()
582 avail -= len; in mmp_pdma_prep_slave_sg()
586 first->async_tx.cookie = -EBUSY; in mmp_pdma_prep_slave_sg()
587 first->async_tx.flags = flags; in mmp_pdma_prep_slave_sg()
590 new->desc.ddadr = DDADR_STOP; in mmp_pdma_prep_slave_sg()
591 new->desc.dcmd |= DCMD_ENDIRQEN; in mmp_pdma_prep_slave_sg()
593 chan->dir = dir; in mmp_pdma_prep_slave_sg()
594 chan->cyclic_first = NULL; in mmp_pdma_prep_slave_sg()
596 return &first->async_tx; in mmp_pdma_prep_slave_sg()
600 mmp_pdma_free_desc_list(chan, &first->tx_list); in mmp_pdma_prep_slave_sg()
625 mmp_pdma_config_write(dchan, &chan->slave_config, direction); in mmp_pdma_prep_dma_cyclic()
630 dma_dst = chan->dev_addr; in mmp_pdma_prep_dma_cyclic()
634 dma_src = chan->dev_addr; in mmp_pdma_prep_dma_cyclic()
637 dev_err(chan->dev, "Unsupported direction for cyclic DMA\n"); in mmp_pdma_prep_dma_cyclic()
641 chan->dir = direction; in mmp_pdma_prep_dma_cyclic()
647 dev_err(chan->dev, "no memory for desc\n"); in mmp_pdma_prep_dma_cyclic()
651 new->desc.dcmd = (chan->dcmd | DCMD_ENDIRQEN | in mmp_pdma_prep_dma_cyclic()
653 new->desc.dsadr = dma_src; in mmp_pdma_prep_dma_cyclic()
654 new->desc.dtadr = dma_dst; in mmp_pdma_prep_dma_cyclic()
659 prev->desc.ddadr = new->async_tx.phys; in mmp_pdma_prep_dma_cyclic()
661 new->async_tx.cookie = 0; in mmp_pdma_prep_dma_cyclic()
662 async_tx_ack(&new->async_tx); in mmp_pdma_prep_dma_cyclic()
665 len -= period_len; in mmp_pdma_prep_dma_cyclic()
667 if (chan->dir == DMA_MEM_TO_DEV) in mmp_pdma_prep_dma_cyclic()
673 list_add_tail(&new->node, &first->tx_list); in mmp_pdma_prep_dma_cyclic()
676 first->async_tx.flags = flags; /* client is in control of this ack */ in mmp_pdma_prep_dma_cyclic()
677 first->async_tx.cookie = -EBUSY; in mmp_pdma_prep_dma_cyclic()
680 new->desc.ddadr = first->async_tx.phys; in mmp_pdma_prep_dma_cyclic()
681 chan->cyclic_first = first; in mmp_pdma_prep_dma_cyclic()
683 return &first->async_tx; in mmp_pdma_prep_dma_cyclic()
687 mmp_pdma_free_desc_list(chan, &first->tx_list); in mmp_pdma_prep_dma_cyclic()
700 return -EINVAL; in mmp_pdma_config_write()
703 chan->dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC; in mmp_pdma_config_write()
704 maxburst = cfg->src_maxburst; in mmp_pdma_config_write()
705 width = cfg->src_addr_width; in mmp_pdma_config_write()
706 addr = cfg->src_addr; in mmp_pdma_config_write()
708 chan->dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG; in mmp_pdma_config_write()
709 maxburst = cfg->dst_maxburst; in mmp_pdma_config_write()
710 width = cfg->dst_addr_width; in mmp_pdma_config_write()
711 addr = cfg->dst_addr; in mmp_pdma_config_write()
715 chan->dcmd |= DCMD_WIDTH1; in mmp_pdma_config_write()
717 chan->dcmd |= DCMD_WIDTH2; in mmp_pdma_config_write()
719 chan->dcmd |= DCMD_WIDTH4; in mmp_pdma_config_write()
722 chan->dcmd |= DCMD_BURST8; in mmp_pdma_config_write()
724 chan->dcmd |= DCMD_BURST16; in mmp_pdma_config_write()
726 chan->dcmd |= DCMD_BURST32; in mmp_pdma_config_write()
728 chan->dir = direction; in mmp_pdma_config_write()
729 chan->dev_addr = addr; in mmp_pdma_config_write()
739 memcpy(&chan->slave_config, cfg, sizeof(*cfg)); in mmp_pdma_config()
749 return -EINVAL; in mmp_pdma_terminate_all()
751 disable_chan(chan->phy); in mmp_pdma_terminate_all()
753 spin_lock_irqsave(&chan->desc_lock, flags); in mmp_pdma_terminate_all()
754 mmp_pdma_free_desc_list(chan, &chan->chain_pending); in mmp_pdma_terminate_all()
755 mmp_pdma_free_desc_list(chan, &chan->chain_running); in mmp_pdma_terminate_all()
756 spin_unlock_irqrestore(&chan->desc_lock, flags); in mmp_pdma_terminate_all()
757 chan->idle = true; in mmp_pdma_terminate_all()
768 bool cyclic = chan->cyclic_first != NULL; in mmp_pdma_residue()
771 * If the channel does not have a phy pointer anymore, it has already in mmp_pdma_residue()
774 if (!chan->phy) in mmp_pdma_residue()
777 if (chan->dir == DMA_DEV_TO_MEM) in mmp_pdma_residue()
778 curr = readl(chan->phy->base + DTADR(chan->phy->idx)); in mmp_pdma_residue()
780 curr = readl(chan->phy->base + DSADR(chan->phy->idx)); in mmp_pdma_residue()
782 list_for_each_entry(sw, &chan->chain_running, node) { in mmp_pdma_residue()
785 if (chan->dir == DMA_DEV_TO_MEM) in mmp_pdma_residue()
786 start = sw->desc.dtadr; in mmp_pdma_residue()
788 start = sw->desc.dsadr; in mmp_pdma_residue()
790 len = sw->desc.dcmd & DCMD_LENGTH; in mmp_pdma_residue()
804 residue += end - curr; in mmp_pdma_residue()
821 if (cyclic || !(sw->desc.dcmd & DCMD_ENDIRQEN)) in mmp_pdma_residue()
824 if (sw->async_tx.cookie == cookie) { in mmp_pdma_residue()
851 * mmp_pdma_issue_pending - Issue the DMA start command
859 spin_lock_irqsave(&chan->desc_lock, flags); in mmp_pdma_issue_pending()
861 spin_unlock_irqrestore(&chan->desc_lock, flags); in mmp_pdma_issue_pending()
877 if (chan->cyclic_first) { in dma_do_tasklet()
878 spin_lock_irqsave(&chan->desc_lock, flags); in dma_do_tasklet()
879 desc = chan->cyclic_first; in dma_do_tasklet()
880 dmaengine_desc_get_callback(&desc->async_tx, &cb); in dma_do_tasklet()
881 spin_unlock_irqrestore(&chan->desc_lock, flags); in dma_do_tasklet()
889 spin_lock_irqsave(&chan->desc_lock, flags); in dma_do_tasklet()
891 list_for_each_entry_safe(desc, _desc, &chan->chain_running, node) { in dma_do_tasklet()
896 list_move(&desc->node, &chain_cleanup); in dma_do_tasklet()
903 if (desc->desc.dcmd & DCMD_ENDIRQEN) { in dma_do_tasklet()
904 dma_cookie_t cookie = desc->async_tx.cookie; in dma_do_tasklet()
905 dma_cookie_complete(&desc->async_tx); in dma_do_tasklet()
906 dev_dbg(chan->dev, "completed_cookie=%d\n", cookie); in dma_do_tasklet()
915 chan->idle = list_empty(&chan->chain_running); in dma_do_tasklet()
919 spin_unlock_irqrestore(&chan->desc_lock, flags); in dma_do_tasklet()
923 struct dma_async_tx_descriptor *txd = &desc->async_tx; in dma_do_tasklet()
926 list_del(&desc->node); in dma_do_tasklet()
931 dma_pool_free(chan->desc_pool, desc, txd->phys); in dma_do_tasklet()
938 struct mmp_pdma_phy *phy; in mmp_pdma_remove() local
941 if (op->dev.of_node) in mmp_pdma_remove()
942 of_dma_controller_free(op->dev.of_node); in mmp_pdma_remove()
944 for (i = 0; i < pdev->dma_channels; i++) { in mmp_pdma_remove()
949 if (irq_num != pdev->dma_channels) { in mmp_pdma_remove()
951 devm_free_irq(&op->dev, irq, pdev); in mmp_pdma_remove()
953 for (i = 0; i < pdev->dma_channels; i++) { in mmp_pdma_remove()
954 phy = &pdev->phy[i]; in mmp_pdma_remove()
956 devm_free_irq(&op->dev, irq, phy); in mmp_pdma_remove()
960 dma_async_device_unregister(&pdev->device); in mmp_pdma_remove()
966 struct mmp_pdma_phy *phy = &pdev->phy[idx]; in mmp_pdma_chan_init() local
970 chan = devm_kzalloc(pdev->dev, sizeof(*chan), GFP_KERNEL); in mmp_pdma_chan_init()
972 return -ENOMEM; in mmp_pdma_chan_init()
974 phy->idx = idx; in mmp_pdma_chan_init()
975 phy->base = pdev->base; in mmp_pdma_chan_init()
978 ret = devm_request_irq(pdev->dev, irq, mmp_pdma_chan_handler, in mmp_pdma_chan_init()
979 IRQF_SHARED, "pdma", phy); in mmp_pdma_chan_init()
981 dev_err(pdev->dev, "channel request irq fail!\n"); in mmp_pdma_chan_init()
986 spin_lock_init(&chan->desc_lock); in mmp_pdma_chan_init()
987 chan->dev = pdev->dev; in mmp_pdma_chan_init()
988 chan->chan.device = &pdev->device; in mmp_pdma_chan_init()
989 tasklet_setup(&chan->tasklet, dma_do_tasklet); in mmp_pdma_chan_init()
990 INIT_LIST_HEAD(&chan->chain_pending); in mmp_pdma_chan_init()
991 INIT_LIST_HEAD(&chan->chain_running); in mmp_pdma_chan_init()
994 list_add_tail(&chan->chan.device_node, &pdev->device.channels); in mmp_pdma_chan_init()
1000 { .compatible = "marvell,pdma-1.0", },
1008 struct mmp_pdma_device *d = ofdma->of_dma_data; in mmp_pdma_dma_xlate()
1011 chan = dma_get_any_slave_channel(&d->device); in mmp_pdma_dma_xlate()
1015 to_mmp_pdma_chan(chan)->drcmr = dma_spec->args[0]; in mmp_pdma_dma_xlate()
1024 struct mmp_dma_platdata *pdata = dev_get_platdata(&op->dev); in mmp_pdma_probe()
1031 pdev = devm_kzalloc(&op->dev, sizeof(*pdev), GFP_KERNEL); in mmp_pdma_probe()
1033 return -ENOMEM; in mmp_pdma_probe()
1035 pdev->dev = &op->dev; in mmp_pdma_probe()
1037 spin_lock_init(&pdev->phy_lock); in mmp_pdma_probe()
1039 pdev->base = devm_platform_ioremap_resource(op, 0); in mmp_pdma_probe()
1040 if (IS_ERR(pdev->base)) in mmp_pdma_probe()
1041 return PTR_ERR(pdev->base); in mmp_pdma_probe()
1043 of_id = of_match_device(mmp_pdma_dt_ids, pdev->dev); in mmp_pdma_probe()
1045 /* Parse new and deprecated dma-channels properties */ in mmp_pdma_probe()
1046 if (of_property_read_u32(pdev->dev->of_node, "dma-channels", in mmp_pdma_probe()
1048 of_property_read_u32(pdev->dev->of_node, "#dma-channels", in mmp_pdma_probe()
1050 } else if (pdata && pdata->dma_channels) { in mmp_pdma_probe()
1051 dma_channels = pdata->dma_channels; in mmp_pdma_probe()
1055 pdev->dma_channels = dma_channels; in mmp_pdma_probe()
1062 pdev->phy = devm_kcalloc(pdev->dev, dma_channels, sizeof(*pdev->phy), in mmp_pdma_probe()
1064 if (pdev->phy == NULL) in mmp_pdma_probe()
1065 return -ENOMEM; in mmp_pdma_probe()
1067 INIT_LIST_HEAD(&pdev->device.channels); in mmp_pdma_probe()
1072 ret = devm_request_irq(pdev->dev, irq, mmp_pdma_int_handler, in mmp_pdma_probe()
1085 dma_cap_set(DMA_SLAVE, pdev->device.cap_mask); in mmp_pdma_probe()
1086 dma_cap_set(DMA_MEMCPY, pdev->device.cap_mask); in mmp_pdma_probe()
1087 dma_cap_set(DMA_CYCLIC, pdev->device.cap_mask); in mmp_pdma_probe()
1088 dma_cap_set(DMA_PRIVATE, pdev->device.cap_mask); in mmp_pdma_probe()
1089 pdev->device.dev = &op->dev; in mmp_pdma_probe()
1090 pdev->device.device_alloc_chan_resources = mmp_pdma_alloc_chan_resources; in mmp_pdma_probe()
1091 pdev->device.device_free_chan_resources = mmp_pdma_free_chan_resources; in mmp_pdma_probe()
1092 pdev->device.device_tx_status = mmp_pdma_tx_status; in mmp_pdma_probe()
1093 pdev->device.device_prep_dma_memcpy = mmp_pdma_prep_memcpy; in mmp_pdma_probe()
1094 pdev->device.device_prep_slave_sg = mmp_pdma_prep_slave_sg; in mmp_pdma_probe()
1095 pdev->device.device_prep_dma_cyclic = mmp_pdma_prep_dma_cyclic; in mmp_pdma_probe()
1096 pdev->device.device_issue_pending = mmp_pdma_issue_pending; in mmp_pdma_probe()
1097 pdev->device.device_config = mmp_pdma_config; in mmp_pdma_probe()
1098 pdev->device.device_terminate_all = mmp_pdma_terminate_all; in mmp_pdma_probe()
1099 pdev->device.copy_align = DMAENGINE_ALIGN_8_BYTES; in mmp_pdma_probe()
1100 pdev->device.src_addr_widths = widths; in mmp_pdma_probe()
1101 pdev->device.dst_addr_widths = widths; in mmp_pdma_probe()
1102 pdev->device.directions = BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM); in mmp_pdma_probe()
1103 pdev->device.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR; in mmp_pdma_probe()
1105 if (pdev->dev->coherent_dma_mask) in mmp_pdma_probe()
1106 dma_set_mask(pdev->dev, pdev->dev->coherent_dma_mask); in mmp_pdma_probe()
1108 dma_set_mask(pdev->dev, DMA_BIT_MASK(64)); in mmp_pdma_probe()
1110 ret = dma_async_device_register(&pdev->device); in mmp_pdma_probe()
1112 dev_err(pdev->device.dev, "unable to register\n"); in mmp_pdma_probe()
1116 if (op->dev.of_node) { in mmp_pdma_probe()
1117 /* Device-tree DMA controller registration */ in mmp_pdma_probe()
1118 ret = of_dma_controller_register(op->dev.of_node, in mmp_pdma_probe()
1121 dev_err(&op->dev, "of_dma_controller_register failed\n"); in mmp_pdma_probe()
1122 dma_async_device_unregister(&pdev->device); in mmp_pdma_probe()
1128 dev_info(pdev->device.dev, "initialized %d channels\n", dma_channels); in mmp_pdma_probe()
1133 { "mmp-pdma", },
1139 .name = "mmp-pdma",