30 	struct fsl_edma_chan *fsl_chan = to_fsl_edma_chan(chan);  in fsl_edma_synchronize()  local
32 	vchan_synchronize(&fsl_chan->vchan);  in fsl_edma_synchronize()
56 	struct fsl_edma_chan *fsl_chan = dev_id;  in fsl_edma3_tx_handler()  local
59 	intr = edma_readl_chreg(fsl_chan, ch_int);  in fsl_edma3_tx_handler()
63 	edma_writel_chreg(fsl_chan, 1, ch_int);  in fsl_edma3_tx_handler()
65 	fsl_edma_tx_chan_handler(fsl_chan);  in fsl_edma3_tx_handler()
103 	struct fsl_edma_chan *fsl_chan;  in fsl_edma_xlate()  local
118 				fsl_chan = to_fsl_edma_chan(chan);  in fsl_edma_xlate()
119 				fsl_chan->slave_id = dma_spec->args[1];  in fsl_edma_xlate()
120 				fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id,  in fsl_edma_xlate()
136 	struct fsl_edma_chan *fsl_chan;  in fsl_edma3_xlate()  local
152 		fsl_chan = to_fsl_edma_chan(chan);  in fsl_edma3_xlate()
153 		i = fsl_chan - fsl_edma->chans;  in fsl_edma3_xlate()
155 		fsl_chan->priority = dma_spec->args[1];  in fsl_edma3_xlate()
156 		fsl_chan->is_rxchan = dma_spec->args[2] & FSL_EDMA_RX;  in fsl_edma3_xlate()
157 		fsl_chan->is_remote = dma_spec->args[2] & FSL_EDMA_REMOTE;  in fsl_edma3_xlate()
158 		fsl_chan->is_multi_fifo = dma_spec->args[2] & FSL_EDMA_MULTI_FIFO;  in fsl_edma3_xlate()
171 		} else if (b_chmux && !fsl_chan->srcid) {  in fsl_edma3_xlate()
175 			fsl_chan->srcid = dma_spec->args[0];  in fsl_edma3_xlate()
232 		struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i];  in fsl_edma3_irq_init()  local
238 		fsl_chan->txirq = platform_get_irq(pdev, i);  in fsl_edma3_irq_init()
239 		if (fsl_chan->txirq < 0) {  in fsl_edma3_irq_init()
244 		ret = devm_request_irq(&pdev->dev, fsl_chan->txirq,  in fsl_edma3_irq_init()
246 			fsl_chan->chan_name, fsl_chan);  in fsl_edma3_irq_init()
389 	struct fsl_edma_chan *fsl_chan;  in fsl_edma3_detach_pd()  local
395 		fsl_chan = &fsl_edma->chans[i];  in fsl_edma3_detach_pd()
396 		if (fsl_chan->pd_dev_link)  in fsl_edma3_detach_pd()
397 			device_link_del(fsl_chan->pd_dev_link);  in fsl_edma3_detach_pd()
398 		if (fsl_chan->pd_dev) {  in fsl_edma3_detach_pd()
399 			dev_pm_domain_detach(fsl_chan->pd_dev, false);  in fsl_edma3_detach_pd()
400 			pm_runtime_dont_use_autosuspend(fsl_chan->pd_dev);  in fsl_edma3_detach_pd()
401 			pm_runtime_set_suspended(fsl_chan->pd_dev);  in fsl_edma3_detach_pd()
413 	struct fsl_edma_chan *fsl_chan;  in fsl_edma3_attach_pd()  local
424 		fsl_chan = &fsl_edma->chans[i];  in fsl_edma3_attach_pd()
432 		fsl_chan->pd_dev_link = device_link_add(dev, pd_chan, DL_FLAG_STATELESS |  in fsl_edma3_attach_pd()
435 		if (!fsl_chan->pd_dev_link) {  in fsl_edma3_attach_pd()
441 		fsl_chan->pd_dev = pd_chan;  in fsl_edma3_attach_pd()
443 		pm_runtime_use_autosuspend(fsl_chan->pd_dev);  in fsl_edma3_attach_pd()
444 		pm_runtime_set_autosuspend_delay(fsl_chan->pd_dev, 200);  in fsl_edma3_attach_pd()
445 		pm_runtime_set_active(fsl_chan->pd_dev);  in fsl_edma3_attach_pd()
560 		struct fsl_edma_chan *fsl_chan = &fsl_edma->chans[i];  in fsl_edma_probe()  local
566 		snprintf(fsl_chan->chan_name, sizeof(fsl_chan->chan_name), "%s-CH%02d",  in fsl_edma_probe()
569 		fsl_chan->edma = fsl_edma;  in fsl_edma_probe()
570 		fsl_chan->pm_state = RUNNING;  in fsl_edma_probe()
571 		fsl_chan->slave_id = 0;  in fsl_edma_probe()
572 		fsl_chan->idle = true;  in fsl_edma_probe()
573 		fsl_chan->dma_dir = DMA_NONE;  in fsl_edma_probe()
574 		fsl_chan->vchan.desc_free = fsl_edma_free_desc;  in fsl_edma_probe()
578 		fsl_chan->tcd = fsl_edma->membase  in fsl_edma_probe()
580 		fsl_chan->mux_addr = fsl_edma->membase + drvdata->mux_off + i * drvdata->mux_skip;  in fsl_edma_probe()
584 			fsl_chan->clk = devm_clk_get_enabled(&pdev->dev,  in fsl_edma_probe()
587 			if (IS_ERR(fsl_chan->clk))  in fsl_edma_probe()
588 				return PTR_ERR(fsl_chan->clk);  in fsl_edma_probe()
590 		fsl_chan->pdev = pdev;  in fsl_edma_probe()
591 		vchan_init(&fsl_chan->vchan, &fsl_edma->dma_dev);  in fsl_edma_probe()
593 		edma_write_tcdreg(fsl_chan, 0, csr);  in fsl_edma_probe()
594 		fsl_edma_chan_mux(fsl_chan, 0, false);  in fsl_edma_probe()
595 		if (fsl_chan->edma->drvdata->flags & FSL_EDMA_DRV_HAS_CHCLK)  in fsl_edma_probe()
596 			clk_disable_unprepare(fsl_chan->clk);  in fsl_edma_probe()
689 	struct fsl_edma_chan *fsl_chan;  in fsl_edma_suspend_late()  local
694 		fsl_chan = &fsl_edma->chans[i];  in fsl_edma_suspend_late()
697 		spin_lock_irqsave(&fsl_chan->vchan.lock, flags);  in fsl_edma_suspend_late()
699 		if (unlikely(!fsl_chan->idle)) {  in fsl_edma_suspend_late()
701 			fsl_edma_disable_request(fsl_chan);  in fsl_edma_suspend_late()
702 			fsl_edma_chan_mux(fsl_chan, 0, false);  in fsl_edma_suspend_late()
705 		fsl_chan->pm_state = SUSPENDED;  in fsl_edma_suspend_late()
706 		spin_unlock_irqrestore(&fsl_chan->vchan.lock, flags);  in fsl_edma_suspend_late()
715 	struct fsl_edma_chan *fsl_chan;  in fsl_edma_resume_early()  local
720 		fsl_chan = &fsl_edma->chans[i];  in fsl_edma_resume_early()
723 		fsl_chan->pm_state = RUNNING;  in fsl_edma_resume_early()
724 		edma_write_tcdreg(fsl_chan, 0, csr);  in fsl_edma_resume_early()
725 		if (fsl_chan->slave_id != 0)  in fsl_edma_resume_early()
726 			fsl_edma_chan_mux(fsl_chan, fsl_chan->slave_id, true);  in fsl_edma_resume_early()