63 	edma_writel_chreg(fsl_chan, 1, ch_int);  in fsl_edma3_tx_handler()
102 	struct dma_chan *chan, *_chan;  in fsl_edma_xlate()  local
111 	list_for_each_entry_safe(chan, _chan, &fsl_edma->dma_dev.channels, device_node) {  in fsl_edma_xlate()
119 				fsl_chan->slave_id = dma_spec->args[1];  in fsl_edma_xlate()
135 	struct dma_chan *chan, *_chan;  in fsl_edma3_xlate()  local
146 	list_for_each_entry_safe(chan, _chan, &fsl_edma->dma_dev.channels,  in fsl_edma3_xlate()
155 		fsl_chan->priority = dma_spec->args[1];  in fsl_edma3_xlate()
272 	 * 16 channel independent interrupts + 1 error interrupt on i.mx7ulp.  in fsl_edma2_irq_init()
283 		if (i == count - 1)  in fsl_edma2_irq_init()
335 	.dmamuxs = 1,
515 	ret = of_property_read_variable_u32_array(np, "dma-channel-mask", chan_mask, 1, 2);  in fsl_edma_probe()
518 		fsl_edma->chan_masked = chan_mask[1];  in fsl_edma_probe()
531 								      1 + i);  in fsl_edma_probe()
640 	/* Per worst case 'nbytes = 1' take CITER as the max_seg_size */  in fsl_edma_probe()