52 	u32 value;  in idma32_initialize_chan_xbar()  local
55 	value = readl(misc + DMA_REGACCESS_CHID_CFG);  in idma32_initialize_chan_xbar()
57 	value &= ~REGACCESS_CHID_MASK;  in idma32_initialize_chan_xbar()
58 	value |= dwc->chan.chan_id;  in idma32_initialize_chan_xbar()
60 	writel(value, misc + DMA_REGACCESS_CHID_CFG);  in idma32_initialize_chan_xbar()
63 	value = readl(misc + DMA_CTL_CH(dwc->chan.chan_id));  in idma32_initialize_chan_xbar()
65 	value &= ~(CTL_CH_RD_NON_SNOOP_BIT | CTL_CH_WR_NON_SNOOP_BIT);  in idma32_initialize_chan_xbar()
66 	value &= ~(CTL_CH_RD_RS_MASK | CTL_CH_WR_RS_MASK);  in idma32_initialize_chan_xbar()
67 	value &= ~CTL_CH_TRANSFER_MODE_MASK;  in idma32_initialize_chan_xbar()
71 		value |= CTL_CH_TRANSFER_MODE_D2S;  in idma32_initialize_chan_xbar()
72 		value |= CTL_CH_WR_NON_SNOOP_BIT;  in idma32_initialize_chan_xbar()
75 		value |= CTL_CH_TRANSFER_MODE_S2D;  in idma32_initialize_chan_xbar()
76 		value |= CTL_CH_RD_NON_SNOOP_BIT;  in idma32_initialize_chan_xbar()
88 	writel(value, misc + DMA_CTL_CH(dwc->chan.chan_id));  in idma32_initialize_chan_xbar()
91 	value = readl(misc + DMA_XBAR_SEL(dwc->chan.chan_id));  in idma32_initialize_chan_xbar()
94 	value &= ~XBAR_SEL_DEVID_MASK;  in idma32_initialize_chan_xbar()
95 	value |= idma32_get_slave_devfn(dwc);  in idma32_initialize_chan_xbar()
99 		value |= XBAR_SEL_RX_TX_BIT;  in idma32_initialize_chan_xbar()
102 		value &= ~XBAR_SEL_RX_TX_BIT;  in idma32_initialize_chan_xbar()
109 	writel(value, misc + DMA_XBAR_SEL(dwc->chan.chan_id));  in idma32_initialize_chan_xbar()
230 	u64 value = IDMA32C_FP_PSIZE_CH0(64) | IDMA32C_FP_PSIZE_CH1(64) |  in idma32_fifo_partition()  local
235 	fifo_partition |= value << 0;  in idma32_fifo_partition()
238 	fifo_partition |= value << 32;  in idma32_fifo_partition()