Lines Matching full:dw
80 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get() local
84 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); in dwc_desc_get()
99 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_put() local
107 dma_pool_free(dw->desc_pool, child, child->txd.phys); in dwc_desc_put()
111 dma_pool_free(dw->desc_pool, desc, desc->txd.phys); in dwc_desc_put()
117 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
119 dw->initialize_chan(dwc); in dwc_initialize()
122 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
123 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
139 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
141 channel_clear_bit(dw, CH_EN, dwc->mask); in dwc_chan_disable()
142 while (dma_readl(dw, CH_EN) & dwc->mask) in dwc_chan_disable()
152 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_do_single_block() local
165 channel_set_bit(dw, CH_EN, dwc->mask); in dwc_do_single_block()
174 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_dostart() local
179 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_dostart()
214 channel_set_bit(dw, CH_EN, dwc->mask); in dwc_dostart()
260 static void dwc_complete_all(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_complete_all() argument
267 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_complete_all()
272 dwc_chan_disable(dw, dwc); in dwc_complete_all()
291 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_get_sent() local
295 return dw->block2bytes(dwc, ctlhi, ctllo >> 4 & 7); in dwc_get_sent()
298 static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_scan_descriptors() argument
308 status_xfer = dma_readl(dw, RAW.XFER); in dwc_scan_descriptors()
312 dma_writel(dw, CLEAR.XFER, dwc->mask); in dwc_scan_descriptors()
346 dwc_complete_all(dw, dwc); in dwc_scan_descriptors()
405 dwc_chan_disable(dw, dwc); in dwc_scan_descriptors()
421 static void dwc_handle_error(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_handle_error() argument
427 dwc_scan_descriptors(dw, dwc); in dwc_handle_error()
441 dma_writel(dw, CLEAR.ERROR, dwc->mask); in dwc_handle_error()
466 struct dw_dma *dw = from_tasklet(dw, t, tasklet); in dw_dma_tasklet() local
472 status_xfer = dma_readl(dw, RAW.XFER); in dw_dma_tasklet()
473 status_err = dma_readl(dw, RAW.ERROR); in dw_dma_tasklet()
475 dev_vdbg(dw->dma.dev, "%s: status_err=%x\n", __func__, status_err); in dw_dma_tasklet()
477 for (i = 0; i < dw->dma.chancnt; i++) { in dw_dma_tasklet()
478 dwc = &dw->chan[i]; in dw_dma_tasklet()
480 dev_vdbg(dw->dma.dev, "Cyclic xfer is not implemented\n"); in dw_dma_tasklet()
482 dwc_handle_error(dw, dwc); in dw_dma_tasklet()
484 dwc_scan_descriptors(dw, dwc); in dw_dma_tasklet()
488 channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_tasklet()
489 channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_tasklet()
494 struct dw_dma *dw = dev_id; in dw_dma_interrupt() local
498 if (!dw->in_use) in dw_dma_interrupt()
501 status = dma_readl(dw, STATUS_INT); in dw_dma_interrupt()
502 dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status); in dw_dma_interrupt()
512 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_interrupt()
513 channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); in dw_dma_interrupt()
514 channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_interrupt()
516 status = dma_readl(dw, STATUS_INT); in dw_dma_interrupt()
518 dev_err(dw->dma.dev, in dw_dma_interrupt()
523 channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); in dw_dma_interrupt()
524 channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1); in dw_dma_interrupt()
525 channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1); in dw_dma_interrupt()
526 channel_clear_bit(dw, MASK.DST_TRAN, (1 << 8) - 1); in dw_dma_interrupt()
527 channel_clear_bit(dw, MASK.ERROR, (1 << 8) - 1); in dw_dma_interrupt()
530 tasklet_schedule(&dw->tasklet); in dw_dma_interrupt()
542 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_prep_dma_memcpy() local
551 unsigned int data_width = dw->pdata->data_width[m_master]; in dwc_prep_dma_memcpy()
568 ctllo = dw->prepare_ctllo(dwc) in dwc_prep_dma_memcpy()
581 ctlhi = dw->bytes2block(dwc, len - offset, src_width, &xfer_count); in dwc_prep_dma_memcpy()
620 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_prep_slave_sg() local
646 ctllo = dw->prepare_ctllo(dwc) in dwc_prep_slave_sg()
669 ctlhi = dw->bytes2block(dwc, len, mem_width, &dlen); in dwc_prep_slave_sg()
696 ctllo = dw->prepare_ctllo(dwc) in dwc_prep_slave_sg()
717 ctlhi = dw->bytes2block(dwc, len, reg_width, &dlen); in dwc_prep_slave_sg()
785 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_verify_p_buswidth() local
795 max_width = dw->pdata->data_width[dwc->dws.p_master]; in dwc_verify_p_buswidth()
817 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_verify_m_buswidth() local
820 mem_width = dw->pdata->data_width[dwc->dws.m_master]; in dwc_verify_m_buswidth()
852 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_config() local
870 dw->encode_maxburst(dwc, &dwc->dma_sconfig.src_maxburst); in dwc_config()
871 dw->encode_maxburst(dwc, &dwc->dma_sconfig.dst_maxburst); in dwc_config()
878 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_chan_pause() local
881 dw->suspend_chan(dwc, drain); in dwc_chan_pause()
903 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_chan_resume() local
905 dw->resume_chan(dwc, drain); in dwc_chan_resume()
928 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_terminate_all() local
939 dwc_chan_disable(dw, dwc); in dwc_terminate_all()
1030 void do_dw_dma_off(struct dw_dma *dw) in do_dw_dma_off() argument
1032 dma_writel(dw, CFG, 0); in do_dw_dma_off()
1034 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in do_dw_dma_off()
1035 channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); in do_dw_dma_off()
1036 channel_clear_bit(dw, MASK.SRC_TRAN, dw->all_chan_mask); in do_dw_dma_off()
1037 channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask); in do_dw_dma_off()
1038 channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); in do_dw_dma_off()
1040 while (dma_readl(dw, CFG) & DW_CFG_DMA_EN) in do_dw_dma_off()
1044 void do_dw_dma_on(struct dw_dma *dw) in do_dw_dma_on() argument
1046 dma_writel(dw, CFG, DW_CFG_DMA_EN); in do_dw_dma_on()
1052 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_alloc_chan_resources() local
1057 if (dma_readl(dw, CH_EN) & dwc->mask) { in dwc_alloc_chan_resources()
1079 if (!dw->in_use) in dwc_alloc_chan_resources()
1080 do_dw_dma_on(dw); in dwc_alloc_chan_resources()
1081 dw->in_use |= dwc->mask; in dwc_alloc_chan_resources()
1089 struct dw_dma *dw = to_dw_dma(chan->device); in dwc_free_chan_resources() local
1106 channel_clear_bit(dw, MASK.XFER, dwc->mask); in dwc_free_chan_resources()
1107 channel_clear_bit(dw, MASK.BLOCK, dwc->mask); in dwc_free_chan_resources()
1108 channel_clear_bit(dw, MASK.ERROR, dwc->mask); in dwc_free_chan_resources()
1113 dw->in_use &= ~dwc->mask; in dwc_free_chan_resources()
1114 if (!dw->in_use) in dwc_free_chan_resources()
1115 do_dw_dma_off(dw); in dwc_free_chan_resources()
1128 * accelerated multi-block transfers supported, aka LLPs in DW DMAC in dwc_caps()
1141 struct dw_dma *dw = chip->dw; in do_dma_probe() local
1148 dw->pdata = devm_kzalloc(chip->dev, sizeof(*dw->pdata), GFP_KERNEL); in do_dma_probe()
1149 if (!dw->pdata) in do_dma_probe()
1152 dw->regs = chip->regs; in do_dma_probe()
1157 dw_params = dma_readl(dw, DW_PARAMS); in do_dma_probe()
1167 pdata = dw->pdata; in do_dma_probe()
1176 pdata->block_size = dma_readl(dw, MAX_BLK_SIZE); in do_dma_probe()
1185 memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata)); in do_dma_probe()
1188 pdata = dw->pdata; in do_dma_probe()
1191 dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels, sizeof(*dw->chan), in do_dma_probe()
1193 if (!dw->chan) { in do_dma_probe()
1199 dw->all_chan_mask = (1 << pdata->nr_channels) - 1; in do_dma_probe()
1202 dw->disable(dw); in do_dma_probe()
1205 dw->set_device_name(dw, chip->id); in do_dma_probe()
1208 dw->desc_pool = dmam_pool_create(dw->name, chip->dev, in do_dma_probe()
1210 if (!dw->desc_pool) { in do_dma_probe()
1216 tasklet_setup(&dw->tasklet, dw_dma_tasklet); in do_dma_probe()
1219 dw->name, dw); in do_dma_probe()
1223 INIT_LIST_HEAD(&dw->dma.channels); in do_dma_probe()
1225 struct dw_dma_chan *dwc = &dw->chan[i]; in do_dma_probe()
1227 dwc->chan.device = &dw->dma; in do_dma_probe()
1231 &dw->dma.channels); in do_dma_probe()
1233 list_add(&dwc->chan.device_node, &dw->dma.channels); in do_dma_probe()
1241 dwc->ch_regs = &__dw_regs(dw)->CHAN[i]; in do_dma_probe()
1248 channel_clear_bit(dw, CH_EN, dwc->mask); in do_dma_probe()
1255 void __iomem *addr = &__dw_regs(dw)->DWC_PARAMS[r]; in do_dma_probe()
1270 * According to the DW DMA databook the true scatter- in do_dma_probe()
1289 dma_writel(dw, CLEAR.XFER, dw->all_chan_mask); in do_dma_probe()
1290 dma_writel(dw, CLEAR.BLOCK, dw->all_chan_mask); in do_dma_probe()
1291 dma_writel(dw, CLEAR.SRC_TRAN, dw->all_chan_mask); in do_dma_probe()
1292 dma_writel(dw, CLEAR.DST_TRAN, dw->all_chan_mask); in do_dma_probe()
1293 dma_writel(dw, CLEAR.ERROR, dw->all_chan_mask); in do_dma_probe()
1296 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); in do_dma_probe()
1297 dma_cap_set(DMA_PRIVATE, dw->dma.cap_mask); in do_dma_probe()
1298 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); in do_dma_probe()
1300 dw->dma.dev = chip->dev; in do_dma_probe()
1301 dw->dma.device_alloc_chan_resources = dwc_alloc_chan_resources; in do_dma_probe()
1302 dw->dma.device_free_chan_resources = dwc_free_chan_resources; in do_dma_probe()
1304 dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy; in do_dma_probe()
1305 dw->dma.device_prep_slave_sg = dwc_prep_slave_sg; in do_dma_probe()
1307 dw->dma.device_caps = dwc_caps; in do_dma_probe()
1308 dw->dma.device_config = dwc_config; in do_dma_probe()
1309 dw->dma.device_pause = dwc_pause; in do_dma_probe()
1310 dw->dma.device_resume = dwc_resume; in do_dma_probe()
1311 dw->dma.device_terminate_all = dwc_terminate_all; in do_dma_probe()
1313 dw->dma.device_tx_status = dwc_tx_status; in do_dma_probe()
1314 dw->dma.device_issue_pending = dwc_issue_pending; in do_dma_probe()
1317 dw->dma.min_burst = DW_DMA_MIN_BURST; in do_dma_probe()
1318 dw->dma.max_burst = DW_DMA_MAX_BURST; in do_dma_probe()
1319 dw->dma.src_addr_widths = DW_DMA_BUSWIDTHS; in do_dma_probe()
1320 dw->dma.dst_addr_widths = DW_DMA_BUSWIDTHS; in do_dma_probe()
1321 dw->dma.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV) | in do_dma_probe()
1323 dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in do_dma_probe()
1330 dma_set_max_seg_size(dw->dma.dev, dw->chan[0].block_size); in do_dma_probe()
1332 err = dma_async_device_register(&dw->dma); in do_dma_probe()
1344 free_irq(chip->irq, dw); in do_dma_probe()
1352 struct dw_dma *dw = chip->dw; in do_dma_remove() local
1357 do_dw_dma_off(dw); in do_dma_remove()
1358 dma_async_device_unregister(&dw->dma); in do_dma_remove()
1360 free_irq(chip->irq, dw); in do_dma_remove()
1361 tasklet_kill(&dw->tasklet); in do_dma_remove()
1363 list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels, in do_dma_remove()
1366 channel_clear_bit(dw, CH_EN, dwc->mask); in do_dma_remove()
1375 struct dw_dma *dw = chip->dw; in do_dw_dma_disable() local
1377 dw->disable(dw); in do_dw_dma_disable()
1384 struct dw_dma *dw = chip->dw; in do_dw_dma_enable() local
1386 dw->enable(dw); in do_dw_dma_enable()