11 #include "dw-edma-core.h"
12 #include "dw-hdma-v0-core.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-hdma-v0-debugfs.h"
26 static inline struct dw_hdma_v0_regs __iomem *__dw_regs(struct dw_edma *dw)  in __dw_regs()  argument
28 	return dw->chip->reg_base;  in __dw_regs()
32 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch)  in __dw_ch_regs()  argument
35 		return &(__dw_regs(dw)->ch[ch].wr);  in __dw_ch_regs()
37 		return &(__dw_regs(dw)->ch[ch].rd);  in __dw_ch_regs()
40 #define SET_CH_32(dw, dir, ch, name, value) \  argument
41 	writel(value, &(__dw_ch_regs(dw, dir, ch)->name))
43 #define GET_CH_32(dw, dir, ch, name) \  argument
44 	readl(&(__dw_ch_regs(dw, dir, ch)->name))
46 #define SET_BOTH_CH_32(dw, ch, name, value) \  argument
48 		writel(value, &(__dw_ch_regs(dw, EDMA_DIR_WRITE, ch)->name));	\
49 		writel(value, &(__dw_ch_regs(dw, EDMA_DIR_READ, ch)->name));	\
53 static void dw_hdma_v0_core_off(struct dw_edma *dw)  in dw_hdma_v0_core_off()  argument
58 		SET_BOTH_CH_32(dw, id, int_setup,  in dw_hdma_v0_core_off()
60 		SET_BOTH_CH_32(dw, id, int_clear,  in dw_hdma_v0_core_off()
62 		SET_BOTH_CH_32(dw, id, ch_en, 0);  in dw_hdma_v0_core_off()
66 static u16 dw_hdma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir)  in dw_hdma_v0_core_ch_count()  argument
78 	struct dw_edma *dw = chan->dw;  in dw_hdma_v0_core_ch_status()  local
82 			GET_CH_32(dw, chan->id, chan->dir, ch_stat));  in dw_hdma_v0_core_ch_status()
94 	struct dw_edma *dw = chan->dw;  in dw_hdma_v0_core_clear_done_int()  local
96 	SET_CH_32(dw, chan->dir, chan->id, int_clear, HDMA_V0_STOP_INT_MASK);  in dw_hdma_v0_core_clear_done_int()
101 	struct dw_edma *dw = chan->dw;  in dw_hdma_v0_core_clear_abort_int()  local
103 	SET_CH_32(dw, chan->dir, chan->id, int_clear, HDMA_V0_ABORT_INT_MASK);  in dw_hdma_v0_core_clear_abort_int()
108 	struct dw_edma *dw = chan->dw;  in dw_hdma_v0_core_status_int()  local
110 	return GET_CH_32(dw, chan->dir, chan->id, int_stat);  in dw_hdma_v0_core_status_int()
117 	struct dw_edma *dw = dw_irq->dw;  in dw_hdma_v0_core_handle_int()  local
124 		total = dw->wr_ch_cnt;  in dw_hdma_v0_core_handle_int()
128 		total = dw->rd_ch_cnt;  in dw_hdma_v0_core_handle_int()
129 		off = dw->wr_ch_cnt;  in dw_hdma_v0_core_handle_int()
134 		chan = &dw->chan[pos + off];  in dw_hdma_v0_core_handle_int()
160 	if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {  in dw_hdma_v0_write_ll_data()
182 	if (chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) {  in dw_hdma_v0_write_ll_link()
217 	 * In case of remote HDMA engine setup, the DW PCIe RP/EP internal  in dw_hdma_v0_sync_ll_data()
224 	if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))  in dw_hdma_v0_sync_ll_data()
231 	struct dw_edma *dw = chan->dw;  in dw_hdma_v0_core_start()  local
238 		SET_CH_32(dw, chan->dir, chan->id, ch_en, BIT(0));  in dw_hdma_v0_core_start()
240 		tmp = GET_CH_32(dw, chan->dir, chan->id, int_setup);  in dw_hdma_v0_core_start()
244 		if (!(dw->chip->flags & DW_EDMA_CHIP_LOCAL))  in dw_hdma_v0_core_start()
246 		SET_CH_32(dw, chan->dir, chan->id, int_setup, tmp);  in dw_hdma_v0_core_start()
248 		SET_CH_32(dw, chan->dir, chan->id, control1, HDMA_V0_LINKLIST_EN);  in dw_hdma_v0_core_start()
251 		SET_CH_32(dw, chan->dir, chan->id, llp.lsb,  in dw_hdma_v0_core_start()
253 		SET_CH_32(dw, chan->dir, chan->id, llp.msb,  in dw_hdma_v0_core_start()
257 	SET_CH_32(dw, chan->dir, chan->id, cycle_sync,  in dw_hdma_v0_core_start()
263 	SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START);  in dw_hdma_v0_core_start()
268 	struct dw_edma *dw = chan->dw;  in dw_hdma_v0_core_ch_config()  local
271 	SET_CH_32(dw, chan->dir, chan->id, msi_stop.lsb, chan->msi.address_lo);  in dw_hdma_v0_core_ch_config()
272 	SET_CH_32(dw, chan->dir, chan->id, msi_stop.msb, chan->msi.address_hi);  in dw_hdma_v0_core_ch_config()
274 	SET_CH_32(dw, chan->dir, chan->id, msi_abort.lsb, chan->msi.address_lo);  in dw_hdma_v0_core_ch_config()
275 	SET_CH_32(dw, chan->dir, chan->id, msi_abort.msb, chan->msi.address_hi);  in dw_hdma_v0_core_ch_config()
277 	SET_CH_32(dw, chan->dir, chan->id, msi_msgdata, chan->msi.data);  in dw_hdma_v0_core_ch_config()
281 static void dw_hdma_v0_core_debugfs_on(struct dw_edma *dw)  in dw_hdma_v0_core_debugfs_on()  argument
283 	dw_hdma_v0_debugfs_on(dw);  in dw_hdma_v0_core_debugfs_on()
296 void dw_hdma_v0_core_register(struct dw_edma *dw)  in dw_hdma_v0_core_register()  argument
298 	dw->core = &dw_hdma_v0_core;  in dw_hdma_v0_core_register()