196 static const struct hisi_qm_cap_info hpre_basic_info[] = {  variable
724 		val2 = hisi_qm_get_hw_info(qm, hpre_basic_info,  in hpre_master_ooo_ctrl()
741 	ce = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_CE_MASK_CAP, qm->cap_ver);  in hpre_hw_error_disable()
742 	nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver);  in hpre_hw_error_disable()
754 	ce = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_CE_MASK_CAP, qm->cap_ver);  in hpre_hw_error_enable()
755 	nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver);  in hpre_hw_error_enable()
1118 		hpre_cap[i].cap_val = hisi_qm_get_hw_info(qm, hpre_basic_info,  in hpre_pre_store_cap_reg()
1286 	nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_NFE_MASK_CAP, qm->cap_ver);  in hpre_clear_hw_err_status()
1306 	err_info->ce = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_QM_CE_MASK_CAP, qm->cap_ver);  in hpre_err_info_init()
1307 	err_info->nfe = hisi_qm_get_hw_info(qm, hpre_basic_info, HPRE_QM_NFE_MASK_CAP, qm->cap_ver);  in hpre_err_info_init()
1309 	err_info->dev_shutdown_mask = hisi_qm_get_hw_info(qm, hpre_basic_info,  in hpre_err_info_init()
1311 	err_info->qm_shutdown_mask = hisi_qm_get_hw_info(qm, hpre_basic_info,  in hpre_err_info_init()
1313 	err_info->qm_reset_mask = hisi_qm_get_hw_info(qm, hpre_basic_info,  in hpre_err_info_init()
1315 	err_info->dev_reset_mask = hisi_qm_get_hw_info(qm, hpre_basic_info,  in hpre_err_info_init()