Lines Matching +full:cryptocell +full:- +full:712 +full:- +full:ree

1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2012-2019 ARM Limited or its affiliates. */
78 .name = "712", .rev = CC_HW_REV_712, .sig = 0xDCC71200U,
93 { .compatible = "arm,cryptocell-703-ree", .data = &cc703_hw },
94 { .compatible = "arm,cryptocell-713-ree", .data = &cc713_hw },
95 { .compatible = "arm,cryptocell-712-ree", .data = &cc712_hw },
96 { .compatible = "arm,cryptocell-710-ree", .data = &cc710_hw },
97 { .compatible = "arm,cryptocell-630p-ree", .data = &cc630p_hw },
112 /* non cached or write-back, write allocate */ in init_cc_cache_params()
113 val = drvdata->coherent ? 0xb : 0x2; in init_cc_cache_params()
127 drvdata->cache_params = cache_params; in init_cc_cache_params()
131 if (drvdata->hw_rev <= CC_HW_REV_710) in init_cc_cache_params()
136 dev_dbg(dev, "ACE-const previous: 0x%08X\n", ace_const); in init_cc_cache_params()
138 /* system or outer-sharable */ in init_cc_cache_params()
139 val = drvdata->coherent ? 0x2 : 0x3; in init_cc_cache_params()
149 dev_dbg(dev, "ACE-const current: 0x%08X\n", ace_const); in init_cc_cache_params()
151 drvdata->ace_const = ace_const; in init_cc_cache_params()
202 /* clear interrupt - must be before processing events */ in cc_isr()
205 drvdata->irq = irr; in cc_isr()
206 /* Completion interrupt - most probable */ in cc_isr()
207 if (irr & drvdata->comp_mask) { in cc_isr()
208 /* Mask all completion interrupts - will be unmasked in in cc_isr()
211 cc_iowrite(drvdata, CC_REG(HOST_IMR), imr | drvdata->comp_mask); in cc_isr()
212 irr &= ~drvdata->comp_mask; in cc_isr()
218 /* Mask interrupt - will be unmasked in Deferred service in cc_isr()
252 /* 712/710/63 has no reset completion indication, always return true */ in cc_wait_for_reset_completion()
253 if (drvdata->hw_rev <= CC_HW_REV_712) in cc_wait_for_reset_completion()
279 if (drvdata->hw_rev <= CC_HW_REV_712) { in init_cc_regs()
292 val = drvdata->comp_mask | CC_AXI_ERR_IRQ_MASK; in init_cc_regs()
294 if (drvdata->hw_rev >= CC_HW_REV_712) in init_cc_regs()
299 cc_iowrite(drvdata, CC_REG(AXIM_CACHE_PARAMS), drvdata->cache_params); in init_cc_regs()
300 if (drvdata->hw_rev >= CC_HW_REV_712) in init_cc_regs()
301 cc_iowrite(drvdata, CC_REG(AXIM_ACE_CONST), drvdata->ace_const); in init_cc_regs()
310 struct device *dev = &plat_dev->dev; in init_cc_resources()
311 struct device_node *np = dev->of_node; in init_cc_resources()
321 return -ENOMEM; in init_cc_resources()
324 new_drvdata->hw_rev_name = hw_rev->name; in init_cc_resources()
325 new_drvdata->hw_rev = hw_rev->rev; in init_cc_resources()
326 new_drvdata->std_bodies = hw_rev->std_bodies; in init_cc_resources()
328 if (hw_rev->rev >= CC_HW_REV_712) { in init_cc_resources()
329 new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP); in init_cc_resources()
330 new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_712); in init_cc_resources()
331 new_drvdata->ver_offset = CC_REG(HOST_VERSION_712); in init_cc_resources()
333 new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP8); in init_cc_resources()
334 new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_630); in init_cc_resources()
335 new_drvdata->ver_offset = CC_REG(HOST_VERSION_630); in init_cc_resources()
338 new_drvdata->comp_mask = CC_COMP_IRQ_MASK; in init_cc_resources()
341 new_drvdata->plat_dev = plat_dev; in init_cc_resources()
346 new_drvdata->clk = clk; in init_cc_resources()
348 new_drvdata->coherent = of_dma_is_coherent(np); in init_cc_resources()
353 new_drvdata->cc_base = devm_platform_get_and_ioremap_resource(plat_dev, in init_cc_resources()
355 if (IS_ERR(new_drvdata->cc_base)) in init_cc_resources()
356 return PTR_ERR(new_drvdata->cc_base); in init_cc_resources()
358 dev_dbg(dev, "Got MEM resource (%s): %pR\n", req_mem_cc_regs->name, in init_cc_resources()
361 &req_mem_cc_regs->start, new_drvdata->cc_base); in init_cc_resources()
368 init_completion(&new_drvdata->hw_queue_avail); in init_cc_resources()
370 if (!dev->dma_mask) in init_cc_resources()
371 dev->dma_mask = &dev->coherent_dma_mask; in init_cc_resources()
381 rc = clk_prepare_enable(new_drvdata->clk); in init_cc_resources()
387 new_drvdata->sec_disabled = cc_sec_disable; in init_cc_resources()
399 /* Wait for Cryptocell reset completion */ in init_cc_resources()
401 dev_err(dev, "Cryptocell reset not completed"); in init_cc_resources()
404 if (hw_rev->rev <= CC_HW_REV_712) { in init_cc_resources()
406 val = cc_ioread(new_drvdata, new_drvdata->sig_offset); in init_cc_resources()
407 if (val != hw_rev->sig) { in init_cc_resources()
409 val, hw_rev->sig); in init_cc_resources()
410 rc = -EINVAL; in init_cc_resources()
414 hw_rev_pidr = cc_ioread(new_drvdata, new_drvdata->ver_offset); in init_cc_resources()
418 if (val != hw_rev->pidr_0124) { in init_cc_resources()
420 val, hw_rev->pidr_0124); in init_cc_resources()
421 rc = -EINVAL; in init_cc_resources()
427 if (val != hw_rev->cidr_0123) { in init_cc_resources()
429 val, hw_rev->cidr_0123); in init_cc_resources()
430 rc = -EINVAL; in init_cc_resources()
442 if (new_drvdata->std_bodies & CC_STD_NIST) { in init_cc_resources()
444 new_drvdata->std_bodies = CC_STD_OSCCA; in init_cc_resources()
449 rc = -EINVAL; in init_cc_resources()
456 new_drvdata->sec_disabled |= !!val; in init_cc_resources()
458 if (!new_drvdata->sec_disabled) { in init_cc_resources()
459 new_drvdata->comp_mask |= CC_CPP_SM4_ABORT_MASK; in init_cc_resources()
460 if (new_drvdata->std_bodies & CC_STD_NIST) in init_cc_resources()
461 new_drvdata->comp_mask |= CC_CPP_AES_ABORT_MASK; in init_cc_resources()
465 if (new_drvdata->sec_disabled) in init_cc_resources()
469 dev_info(dev, "ARM CryptoCell %s Driver: HW version 0x%08X/0x%8X, Driver version %s\n", in init_cc_resources()
470 hw_rev->name, hw_rev_pidr, sig_cidr, DRV_MODULE_VERSION); in init_cc_resources()
505 new_drvdata->mlli_sram_addr = in init_cc_resources()
507 if (new_drvdata->mlli_sram_addr == NULL_SRAM_ADDR) { in init_cc_resources()
508 rc = -ENOMEM; in init_cc_resources()
573 clk_disable_unprepare(new_drvdata->clk); in init_cc_resources()
585 struct device *dev = &plat_dev->dev; in cleanup_cc_resources()
600 clk_disable_unprepare(drvdata->clk); in cleanup_cc_resources()
605 if (drvdata->hw_rev >= CC_HW_REV_712) in cc_get_default_hash_len()
614 struct device *dev = &plat_dev->dev; in ccree_probe()
628 struct device *dev = &plat_dev->dev; in ccree_remove()
675 MODULE_DESCRIPTION("ARM TrustZone CryptoCell REE Driver");