Lines Matching refs:timer

49 static inline u32 apbt_readl(struct dw_apb_timer *timer, unsigned long offs)  in apbt_readl()  argument
51 return readl(timer->base + offs); in apbt_readl()
54 static inline void apbt_writel(struct dw_apb_timer *timer, u32 val, in apbt_writel() argument
57 writel(val, timer->base + offs); in apbt_writel()
60 static inline u32 apbt_readl_relaxed(struct dw_apb_timer *timer, unsigned long offs) in apbt_readl_relaxed() argument
62 return readl_relaxed(timer->base + offs); in apbt_readl_relaxed()
65 static inline void apbt_writel_relaxed(struct dw_apb_timer *timer, u32 val, in apbt_writel_relaxed() argument
68 writel_relaxed(val, timer->base + offs); in apbt_writel_relaxed()
71 static void apbt_disable_int(struct dw_apb_timer *timer) in apbt_disable_int() argument
73 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_disable_int()
76 apbt_writel(timer, ctrl, APBTMR_N_CONTROL); in apbt_disable_int()
86 disable_irq(dw_ced->timer.irq); in dw_apb_clockevent_pause()
87 apbt_disable_int(&dw_ced->timer); in dw_apb_clockevent_pause()
90 static void apbt_eoi(struct dw_apb_timer *timer) in apbt_eoi() argument
92 apbt_readl_relaxed(timer, APBTMR_N_EOI); in apbt_eoi()
106 dw_ced->eoi(&dw_ced->timer); in dw_apb_clockevent_irq()
112 static void apbt_enable_int(struct dw_apb_timer *timer) in apbt_enable_int() argument
114 u32 ctrl = apbt_readl(timer, APBTMR_N_CONTROL); in apbt_enable_int()
116 apbt_readl(timer, APBTMR_N_EOI); in apbt_enable_int()
118 apbt_writel(timer, ctrl, APBTMR_N_CONTROL); in apbt_enable_int()
129 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_shutdown()
131 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_shutdown()
143 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_set_oneshot()
152 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_oneshot()
154 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_oneshot()
160 apbt_writel(&dw_ced->timer, ~0, APBTMR_N_LOAD_COUNT); in apbt_set_oneshot()
163 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_oneshot()
170 unsigned long period = DIV_ROUND_UP(dw_ced->timer.freq, HZ); in apbt_set_periodic()
176 ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_set_periodic()
178 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_periodic()
184 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_periodic()
187 apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT); in apbt_set_periodic()
189 apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_set_periodic()
200 apbt_enable_int(&dw_ced->timer); in apbt_resume()
211 ctrl = apbt_readl_relaxed(&dw_ced->timer, APBTMR_N_CONTROL); in apbt_next_event()
213 apbt_writel_relaxed(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_next_event()
215 apbt_writel_relaxed(&dw_ced->timer, delta, APBTMR_N_LOAD_COUNT); in apbt_next_event()
217 apbt_writel_relaxed(&dw_ced->timer, ctrl, APBTMR_N_CONTROL); in apbt_next_event()
251 dw_ced->timer.base = base; in dw_apb_clockevent_init()
252 dw_ced->timer.irq = irq; in dw_apb_clockevent_init()
253 dw_ced->timer.freq = freq; in dw_apb_clockevent_init()
270 dw_ced->ced.irq = dw_ced->timer.irq; in dw_apb_clockevent_init()
294 enable_irq(dw_ced->timer.irq); in dw_apb_clockevent_resume()
304 free_irq(dw_ced->timer.irq, &dw_ced->ced); in dw_apb_clockevent_stop()
314 apbt_writel(&dw_ced->timer, 0, APBTMR_N_CONTROL); in dw_apb_clockevent_register()
316 apbt_enable_int(&dw_ced->timer); in dw_apb_clockevent_register()
333 u32 ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL); in dw_apb_clocksource_start()
336 apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL); in dw_apb_clocksource_start()
337 apbt_writel(&dw_cs->timer, ~0, APBTMR_N_LOAD_COUNT); in dw_apb_clocksource_start()
341 apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL); in dw_apb_clocksource_start()
352 current_count = apbt_readl_relaxed(&dw_cs->timer, in __apbt_read_clocksource()
387 dw_cs->timer.base = base; in dw_apb_clocksource_init()
388 dw_cs->timer.freq = freq; in dw_apb_clocksource_init()
406 clocksource_register_hz(&dw_cs->cs, dw_cs->timer.freq); in dw_apb_clocksource_register()
416 return (u64)~apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE); in dw_apb_clocksource_read()