Lines Matching refs:LVL2_CLK_GATE_OVRE

242 #define LVL2_CLK_GATE_OVRE 0x554  macro
653 	ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_venc_mbist_war()
654 	writel_relaxed(ovre | BIT(3), clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_venc_mbist_war()
658 	writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_venc_mbist_war()
687 	ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_vic_mbist_war()
688 	writel_relaxed(ovre | BIT(5), clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_vic_mbist_war()
699 	writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_vic_mbist_war()
710 	ovre = readl_relaxed(clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_ape_mbist_war()
713 			clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_ape_mbist_war()
734 	writel_relaxed(ovre, clk_base + LVL2_CLK_GATE_OVRE);  in tegra210_ape_mbist_war()
2669 		.lvl2_offset = LVL2_CLK_GATE_OVRE,
2721 		.lvl2_offset = LVL2_CLK_GATE_OVRE,
2728 		.lvl2_offset = LVL2_CLK_GATE_OVRE,