Lines Matching refs:tegra20_cpu_clk_sctx
129 } tegra20_cpu_clk_sctx; variable
937 tegra20_cpu_clk_sctx.clk_csite_src = in tegra20_cpu_clock_suspend()
941 tegra20_cpu_clk_sctx.cpu_burst = in tegra20_cpu_clock_suspend()
943 tegra20_cpu_clk_sctx.pllx_base = in tegra20_cpu_clock_suspend()
945 tegra20_cpu_clk_sctx.pllx_misc = in tegra20_cpu_clock_suspend()
947 tegra20_cpu_clk_sctx.cclk_divider = in tegra20_cpu_clock_suspend()
971 if (misc != tegra20_cpu_clk_sctx.pllx_misc || in tegra20_cpu_clock_resume()
972 base != tegra20_cpu_clk_sctx.pllx_base) { in tegra20_cpu_clock_resume()
974 writel(tegra20_cpu_clk_sctx.pllx_misc, in tegra20_cpu_clock_resume()
976 writel(tegra20_cpu_clk_sctx.pllx_base, in tegra20_cpu_clock_resume()
980 if (tegra20_cpu_clk_sctx.pllx_base & (1 << 30)) in tegra20_cpu_clock_resume()
989 writel(tegra20_cpu_clk_sctx.cclk_divider, in tegra20_cpu_clock_resume()
991 writel(tegra20_cpu_clk_sctx.cpu_burst, in tegra20_cpu_clock_resume()
994 writel(tegra20_cpu_clk_sctx.clk_csite_src, in tegra20_cpu_clock_resume()