clk/tegra/clk-tegra-periph.c

269 							   "clk_m"};
285 	"pll_p", "pll_c", "pll_m", "clk_m"
293 	"pll_p", "pll_c", "clk_32k", "clk_m"
298 	"pll_a_out0", "pll_c", "pll_p", "clk_m"
303 	"pll_p", "pll_c2", "pll_c", "pll_c3", "pll_m", "clk_m"
310 	"pll_p", "clk_m"
317 	"pll_p", "clk_m"
324 	"pll_c2", "pll_c", "pll_c3", "pll_p", "pll_a1", "clk_m"
332 	"pll_c4_out1", "pll_c", "pll_c4_out2", "pll_p", "clk_m",
347 	"clk_m", "pll_c", "pll_p", "pll_a_out0"
352 	"pll_c", "pll_p", "pll_a1", "pll_c2", "pll_c3", "clk_m"
359 	"pll_c2", "pll_c", "pll_c3", "pll_p", "clk_m", "pll_a1", "pll_c4_out0",
366 	"pll_c", "pll_p", "pll_a1", "pll_c2", "pll_c3", "clk_m", "pll_c4_out0",
374 	"pll_c4_out2", "clk_m"
385 	"pll_d2_out0", "clk_m"
395 	"pll_p", "pll_c", "clk_m"
402 	"pll_p", "pll_c", "clk_m"
409 	"pll_p", "pll_c", "pll_a_out0", "clk_m"
416 	"pll_p", "pll_c", "pll_c4_out0", "pll_c4_out1", "clk_m", "pll_c4_out2"
425 	"clk_m", "pll_c4_out0"
433 	"pll_p", "pll_c4_out2", "pll_c4_out1", "clk_m", "pll_c4_out0"
440 	"pll_p", "pll_c2", "pll_c", "pll_c3", "clk_m"
447 	"pll_p", "clk_m", "clk_32k", "pll_e"
454 	"pll_p", "pll_p_out3", "clk_m", "clk_32k", "pll_a_out0"
459 	"pll_p_out3", "clk_m", "pll_p", "pll_c4_out0", "pll_c4_out1",
467 	"clk_m", "pll_p_out_xusb", "pll_re_out"
474 	"pll_p", "pll_c", "clk_m", "clk_32k"
479 	"pll_a_out0", "clk_32k", "pll_p", "clk_m", "pll_e_out0"
484 	"clk_m", "pll_p", "pll_c", "pll_re_out"
491 	"clk_m", "pll_u_48M", "pll_p", "pll_u_480M"
498 	"clk_m", "pll_re_out", "clk_32k", "pll_u_480M"
503 	"clk_m", "pll_re_out", "clk_32k", "pll_u_480M", "pll_c", "pll_ref"
510 	"pll_p_out3", "pll_p", "pll_c", "clk_m"
527 	"xusb_ss_src", "clk_m"
532 	"pll_a_out0", "pll_p", "clk_m", "spdif_in_sync", "i2s0_sync",
541 	"pll_p", "pll_d_out0", "pll_c", "clk_m"
545 	"pll_m", "pll_c", "pll_p", "pll_a_out0", "clk_m", "pll_c4",
552 	"pll_p", "clk_m",
557 	"pll_p_out3", "pll_c", "pll_c2", "clk_m",
562 	"pll_m", "pll_c", "pll_p", "pll_a", "pll_c2", "pll_c3", "clk_m"
575 	"pll_p", "pll_d_out0", "pll_d2_out0", "clk_m"
582 	"pll_p", "pll_re_out1", "clk_m"
590 	"pll_a_out0", "dmic1_sync_clk", "pll_p", "clk_m"
595 	"pll_a_out0", "dmic2_sync_clk", "pll_p", "clk_m"
600 	"pll_a_out0", "dmic3_sync_clk", "pll_p", "clk_m"
774 	GATE("timer", "clk_m", 5, 0, tegra_clk_timer, CLK_IS_CRITICAL),
775 	GATE("isp", "clk_m", 23, 0, tegra_clk_isp, 0),
776 	GATE("vcp", "clk_m", 29, 0, tegra_clk_vcp, 0),
780 	GATE("fuse", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse, 0),
781 	GATE("fuse_burn", "clk_m", 39, TEGRA_PERIPH_ON_APB, tegra_clk_fuse_burn, 0),
782 	GATE("kfuse", "clk_m", 40, TEGRA_PERIPH_ON_APB, tegra_clk_kfuse, 0),
783 	GATE("apbif", "clk_m", 107, TEGRA_PERIPH_ON_APB, tegra_clk_apbif, 0),
784 	GATE("hda2hdmi", "clk_m", 128, TEGRA_PERIPH_ON_APB, tegra_clk_hda2hdmi, 0),
785 	GATE("bsea", "clk_m", 62, 0, tegra_clk_bsea, 0),
786 	GATE("bsev", "clk_m", 63, 0, tegra_clk_bsev, 0),
788 	GATE("usbd", "clk_m", 22, 0, tegra_clk_usbd, 0),
789 	GATE("usb2", "clk_m", 58, 0, tegra_clk_usb2, 0),
790 	GATE("usb3", "clk_m", 59, 0, tegra_clk_usb3, 0),
793 	GATE("csus", "clk_m", 92, TEGRA_PERIPH_NO_RESET, tegra_clk_csus, 0),
794 	GATE("dds", "clk_m", 150, TEGRA_PERIPH_ON_APB, tegra_clk_dds, 0),
795 	GATE("dp2", "clk_m", 152, TEGRA_PERIPH_ON_APB, tegra_clk_dp2, 0),
796 	GATE("dtv", "clk_m", 79, TEGRA_PERIPH_ON_APB, tegra_clk_dtv, 0),
801 	GATE("sata_cold", "clk_m", 129, TEGRA_PERIPH_ON_APB, tegra_clk_sata_cold, 0),
804 	GATE("vim2_clk", "clk_m", 11, 0, tegra_clk_vim2_clk, 0),
805 	GATE("pcie", "clk_m", 70, 0, tegra_clk_pcie, 0),
813 	GATE("apb2ape", "clk_m", 107, 0, tegra_clk_apb2ape, 0),
815 	GATE("iqc1", "clk_m", 221, 0, tegra_clk_iqc1, 0),
816 	GATE("iqc2", "clk_m", 220, 0, tegra_clk_iqc1, 0),