Lines Matching refs:JH7110_STGCLK_END
18 #define JH7110_STGCLK_OSC (JH7110_STGCLK_END + 0)
19 #define JH7110_STGCLK_HIFI4_CORE (JH7110_STGCLK_END + 1)
20 #define JH7110_STGCLK_STG_AXIAHB (JH7110_STGCLK_END + 2)
21 #define JH7110_STGCLK_USB_125M (JH7110_STGCLK_END + 3)
22 #define JH7110_STGCLK_CPU_BUS (JH7110_STGCLK_END + 4)
23 #define JH7110_STGCLK_HIFI4_AXI (JH7110_STGCLK_END + 5)
24 #define JH7110_STGCLK_NOCSTG_BUS (JH7110_STGCLK_END + 6)
25 #define JH7110_STGCLK_APB_BUS (JH7110_STGCLK_END + 7)
26 #define JH7110_STGCLK_EXT_END (JH7110_STGCLK_END + 8)
83 if (idx < JH7110_STGCLK_END) in jh7110_stgclk_get()
95 priv = devm_kzalloc(&pdev->dev, struct_size(priv, reg, JH7110_STGCLK_END), in jh7110_stgcrg_probe()
106 for (idx = 0; idx < JH7110_STGCLK_END; idx++) { in jh7110_stgcrg_probe()
118 const char *fw_name[JH7110_STGCLK_EXT_END - JH7110_STGCLK_END] = { in jh7110_stgcrg_probe()
133 if (pidx < JH7110_STGCLK_END) in jh7110_stgcrg_probe()
136 parents[i].fw_name = fw_name[pidx - JH7110_STGCLK_END]; in jh7110_stgcrg_probe()