Lines Matching refs:src_reg
58 u32 src_reg; in socfpga_clk_set_parent() local
62 src_reg = readl(clk_mgr_base_addr + CLKMGR_L4SRC); in socfpga_clk_set_parent()
63 src_reg &= ~0x1; in socfpga_clk_set_parent()
64 src_reg |= parent; in socfpga_clk_set_parent()
65 writel(src_reg, clk_mgr_base_addr + CLKMGR_L4SRC); in socfpga_clk_set_parent()
67 src_reg = readl(clk_mgr_base_addr + CLKMGR_L4SRC); in socfpga_clk_set_parent()
68 src_reg &= ~0x2; in socfpga_clk_set_parent()
69 src_reg |= (parent << 1); in socfpga_clk_set_parent()
70 writel(src_reg, clk_mgr_base_addr + CLKMGR_L4SRC); in socfpga_clk_set_parent()
72 src_reg = readl(clk_mgr_base_addr + CLKMGR_PERPLL_SRC); in socfpga_clk_set_parent()
74 src_reg &= ~0x3; in socfpga_clk_set_parent()
75 src_reg |= parent; in socfpga_clk_set_parent()
78 src_reg &= ~0xC; in socfpga_clk_set_parent()
79 src_reg |= (parent << 2); in socfpga_clk_set_parent()
81 src_reg &= ~0x30; in socfpga_clk_set_parent()
82 src_reg |= (parent << 4); in socfpga_clk_set_parent()
84 writel(src_reg, clk_mgr_base_addr + CLKMGR_PERPLL_SRC); in socfpga_clk_set_parent()