Lines Matching +full:0 +full:x7c

227 	{ AGILEX_BOOT_CLK, "boot_clk", boot_mux, ARRAY_SIZE(boot_mux), 0,
228 0x0},
230 0, 0x48},
232 0, 0x9c},
236 { AGILEX_MAIN_PLL_C0_CLK, "main_pll_c0", "main_pll", NULL, 1, 0, 0x54, 0},
237 { AGILEX_MAIN_PLL_C1_CLK, "main_pll_c1", "main_pll", NULL, 1, 0, 0x54, 8},
238 { AGILEX_MAIN_PLL_C2_CLK, "main_pll_c2", "main_pll", NULL, 1, 0, 0x54, 16},
239 { AGILEX_MAIN_PLL_C3_CLK, "main_pll_c3", "main_pll", NULL, 1, 0, 0x54, 24},
240 { AGILEX_PERIPH_PLL_C0_CLK, "peri_pll_c0", "periph_pll", NULL, 1, 0, 0xA8, 0},
241 { AGILEX_PERIPH_PLL_C1_CLK, "peri_pll_c1", "periph_pll", NULL, 1, 0, 0xA8, 8},
242 { AGILEX_PERIPH_PLL_C2_CLK, "peri_pll_c2", "periph_pll", NULL, 1, 0, 0xA8, 16},
243 { AGILEX_PERIPH_PLL_C3_CLK, "peri_pll_c3", "periph_pll", NULL, 1, 0, 0xA8, 24},
247 { AGILEX_MAIN_PLL_C0_CLK, "main_pll_c0", "main_pll", NULL, 1, 0, 0x58},
248 { AGILEX_MAIN_PLL_C1_CLK, "main_pll_c1", "main_pll", NULL, 1, 0, 0x5C},
249 { AGILEX_MAIN_PLL_C2_CLK, "main_pll_c2", "main_pll", NULL, 1, 0, 0x64},
250 { AGILEX_MAIN_PLL_C3_CLK, "main_pll_c3", "main_pll", NULL, 1, 0, 0x68},
251 { AGILEX_PERIPH_PLL_C0_CLK, "peri_pll_c0", "periph_pll", NULL, 1, 0, 0xAC},
252 { AGILEX_PERIPH_PLL_C1_CLK, "peri_pll_c1", "periph_pll", NULL, 1, 0, 0xB0},
253 { AGILEX_PERIPH_PLL_C2_CLK, "peri_pll_c2", "periph_pll", NULL, 1, 0, 0xB8},
254 { AGILEX_PERIPH_PLL_C3_CLK, "peri_pll_c3", "periph_pll", NULL, 1, 0, 0xBC},
259 0, 0x3C, 0, 0, 0},
261 0, 0x40, 0, 0, 0},
262 { AGILEX_L4_SYS_FREE_CLK, "l4_sys_free_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0,
263 0, 4, 0x30, 1},
265 0, 0xD4, 0, 0x88, 0},
267 0, 0xD8, 0, 0x88, 1},
269 ARRAY_SIZE(emac_ptp_free_mux), 0, 0xDC, 0, 0x88, 2},
271 ARRAY_SIZE(gpio_db_free_mux), 0, 0xE0, 0, 0x88, 3},
273 ARRAY_SIZE(sdmmc_free_mux), 0, 0xE4, 0, 0, 0},
275 ARRAY_SIZE(s2f_usr0_free_mux), 0, 0xE8, 0, 0x30, 2},
277 ARRAY_SIZE(s2f_usr1_free_mux), 0, 0xEC, 0, 0x88, 5},
279 ARRAY_SIZE(psi_ref_free_mux), 0, 0xF0, 0, 0x88, 6},
283 { AGILEX_MPU_CLK, "mpu_clk", NULL, mpu_mux, ARRAY_SIZE(mpu_mux), 0, 0x24,
284 0, 0, 0, 0, 0x30, 0, 0},
285 { AGILEX_MPU_PERIPH_CLK, "mpu_periph_clk", "mpu_clk", NULL, 1, 0, 0x24,
286 0, 0, 0, 0, 0, 0, 4},
287 { AGILEX_MPU_CCU_CLK, "mpu_ccu_clk", "mpu_clk", NULL, 1, 0, 0x24,
288 0, 0, 0, 0, 0, 0, 2},
289 { AGILEX_L4_MAIN_CLK, "l4_main_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x24,
290 1, 0x44, 0, 2, 0x30, 1, 0},
291 { AGILEX_L4_MP_CLK, "l4_mp_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x24,
292 2, 0x44, 8, 2, 0x30, 1, 0},
297 { AGILEX_L4_SP_CLK, "l4_sp_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), CLK_IS_CRITICAL, 0x24,
298 3, 0x44, 16, 2, 0x30, 1, 0},
299 { AGILEX_CS_AT_CLK, "cs_at_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x24,
300 4, 0x44, 24, 2, 0x30, 1, 0},
301 { AGILEX_CS_TRACE_CLK, "cs_trace_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x24,
302 4, 0x44, 26, 2, 0x30, 1, 0},
303 { AGILEX_CS_PDBG_CLK, "cs_pdbg_clk", "cs_at_clk", NULL, 1, 0, 0x24,
304 4, 0x44, 28, 1, 0, 0, 0},
305 { AGILEX_CS_TIMER_CLK, "cs_timer_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x24,
306 5, 0, 0, 0, 0x30, 1, 0},
307 { AGILEX_EMAC0_CLK, "emac0_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
308 0, 0, 0, 0, 0x94, 26, 0},
309 { AGILEX_EMAC1_CLK, "emac1_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
310 1, 0, 0, 0, 0x94, 27, 0},
311 { AGILEX_EMAC2_CLK, "emac2_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0x7C,
312 2, 0, 0, 0, 0x94, 28, 0},
313 { AGILEX_EMAC_PTP_CLK, "emac_ptp_clk", NULL, emac_ptp_mux, ARRAY_SIZE(emac_ptp_mux), 0, 0x7C,
314 3, 0, 0, 0, 0x88, 2, 0},
315 { AGILEX_GPIO_DB_CLK, "gpio_db_clk", NULL, gpio_db_mux, ARRAY_SIZE(gpio_db_mux), 0, 0x7C,
316 4, 0x98, 0, 16, 0x88, 3, 0},
317 { AGILEX_SDMMC_CLK, "sdmmc_clk", NULL, sdmmc_mux, ARRAY_SIZE(sdmmc_mux), 0, 0x7C,
318 5, 0, 0, 0, 0x88, 4, 4},
319 { AGILEX_S2F_USER0_CLK, "s2f_user0_clk", NULL, s2f_user0_mux, ARRAY_SIZE(s2f_user0_mux), 0, 0x24,
320 6, 0, 0, 0, 0x30, 2, 0},
321 { AGILEX_S2F_USER1_CLK, "s2f_user1_clk", NULL, s2f_user1_mux, ARRAY_SIZE(s2f_user1_mux), 0, 0x7C,
322 6, 0, 0, 0, 0x88, 5, 0},
323 { AGILEX_PSI_REF_CLK, "psi_ref_clk", NULL, psi_mux, ARRAY_SIZE(psi_mux), 0, 0x7C,
324 7, 0, 0, 0, 0x88, 6, 0},
325 { AGILEX_USB_CLK, "usb_clk", "l4_mp_clk", NULL, 1, 0, 0x7C,
326 8, 0, 0, 0, 0, 0, 0},
327 { AGILEX_SPI_M_CLK, "spi_m_clk", "l4_mp_clk", NULL, 1, 0, 0x7C,
328 9, 0, 0, 0, 0, 0, 0},
329 { AGILEX_NAND_X_CLK, "nand_x_clk", "l4_mp_clk", NULL, 1, 0, 0x7C,
330 10, 0, 0, 0, 0, 0, 0},
331 { AGILEX_NAND_CLK, "nand_clk", "nand_x_clk", NULL, 1, 0, 0x7C,
332 10, 0, 0, 0, 0, 0, 4},
333 { AGILEX_NAND_ECC_CLK, "nand_ecc_clk", "nand_x_clk", NULL, 1, 0, 0x7C,
334 10, 0, 0, 0, 0, 0, 4},
344 for (i = 0; i < nums; i++) { in n5x_clk_register_c_perip()
353 return 0; in n5x_clk_register_c_perip()
363 for (i = 0; i < nums; i++) { in agilex_clk_register_c_perip()
372 return 0; in agilex_clk_register_c_perip()
382 for (i = 0; i < nums; i++) { in agilex_clk_register_cnt_perip()
392 return 0; in agilex_clk_register_cnt_perip()
402 for (i = 0; i < nums; i++) { in agilex_clk_register_gate()
412 return 0; in agilex_clk_register_gate()
422 for (i = 0; i < nums; i++) { in agilex_clk_register_pll()
432 return 0; in agilex_clk_register_pll()
442 for (i = 0; i < nums; i++) { in n5x_clk_register_pll()
452 return 0; in n5x_clk_register_pll()
463 base = devm_platform_ioremap_resource(pdev, 0); in agilex_clkmgr_init()
474 for (i = 0; i < num_clks; i++) in agilex_clkmgr_init()
492 return 0; in agilex_clkmgr_init()
503 base = devm_platform_ioremap_resource(pdev, 0); in n5x_clkmgr_init()
514 for (i = 0; i < num_clks; i++) in n5x_clkmgr_init()
532 return 0; in n5x_clkmgr_init()