Lines Matching refs:ENABLE_ACLK_MIF0

972 #define ENABLE_ACLK_MIF0		0x0800  macro
1036 	ENABLE_ACLK_MIF0,
1283 	GATE(CLK_CLK2X_PHY1, "clk2k_phy1", "div_clk2x_phy", ENABLE_ACLK_MIF0,
1285 	GATE(CLK_CLK2X_PHY0, "clk2x_phy0", "div_clk2x_phy", ENABLE_ACLK_MIF0,
1287 	GATE(CLK_CLKM_PHY1, "clkm_phy1", "mout_clkm_phy_c", ENABLE_ACLK_MIF0,
1289 	GATE(CLK_CLKM_PHY0, "clkm_phy0", "mout_clkm_phy_c", ENABLE_ACLK_MIF0,
1291 	GATE(CLK_RCLK_DREX1, "rclk_drex1", "oscclk", ENABLE_ACLK_MIF0,
1293 	GATE(CLK_RCLK_DREX0, "rclk_drex0", "oscclk", ENABLE_ACLK_MIF0,
1296 			ENABLE_ACLK_MIF0, 13, CLK_IGNORE_UNUSED, 0),
1298 			ENABLE_ACLK_MIF0, 12, CLK_IGNORE_UNUSED, 0),
1300 			ENABLE_ACLK_MIF0, 11, CLK_IGNORE_UNUSED, 0),
1302 			ENABLE_ACLK_MIF0, 10, CLK_IGNORE_UNUSED, 0),
1304 			ENABLE_ACLK_MIF0, 9, CLK_IGNORE_UNUSED, 0),
1306 			ENABLE_ACLK_MIF0, 8, CLK_IGNORE_UNUSED, 0),
1308 			ENABLE_ACLK_MIF0, 7, CLK_IGNORE_UNUSED, 0),
1310 			ENABLE_ACLK_MIF0, 6, CLK_IGNORE_UNUSED, 0),
1312 			ENABLE_ACLK_MIF0, 5, CLK_IGNORE_UNUSED, 0),
1314 			ENABLE_ACLK_MIF0, 4, CLK_IGNORE_UNUSED, 0),
1316 			ENABLE_ACLK_MIF0, 3, CLK_IGNORE_UNUSED, 0),
1318 			ENABLE_ACLK_MIF0, 2, CLK_IGNORE_UNUSED, 0),
1320 			ENABLE_ACLK_MIF0, 2, CLK_IGNORE_UNUSED, 0),
1322 			ENABLE_ACLK_MIF0, 1, CLK_IGNORE_UNUSED, 0),