Lines Matching refs:GATE_IP_GSCL1
114 #define GATE_IP_GSCL1 0x10920 macro
242 GATE_IP_GSCL1,
1163 GATE_IP_GSCL1, 2, 0, 0),
1165 GATE_IP_GSCL1, 3, 0, 0),
1167 GATE_IP_GSCL1, 4, 0, 0),
1168 GATE(CLK_GSCL_WA, "gscl_wa", "sclk_gscl_wa", GATE_IP_GSCL1, 12,
1170 GATE(CLK_GSCL_WB, "gscl_wb", "sclk_gscl_wb", GATE_IP_GSCL1, 13,
1173 GATE_IP_GSCL1, 16, 0, 0),
1175 GATE_IP_GSCL1, 17, 0, 0),
1255 GATE_IP_GSCL1, 6, 0, 0),
1257 GATE_IP_GSCL1, 7, 0, 0),
1262 { GATE_IP_GSCL1, 0xc0, 0xc0 }, /* GSC gates */