clk/samsung/clk-exynos3250.c

108 static const unsigned long exynos3250_cmu_clk_regs[] __initconst = {
231 static const struct samsung_fixed_factor_clock fixed_factor_clks[] __initconst = {
242 static const struct samsung_mux_clock mux_clks[] __initconst = {
331 static const struct samsung_div_clock div_clks[] __initconst = {
434 static const struct samsung_gate_clock gate_clks[] __initconst = {
674 static const struct samsung_pll_rate_table exynos3250_pll_rates[] __initconst = {
696 static const struct samsung_pll_rate_table exynos3250_epll_rates[] __initconst = {
715 static const struct samsung_pll_rate_table exynos3250_vpll_rates[] __initconst = {
745 static const struct samsung_pll_clock exynos3250_plls[] __initconst = {
762 static const struct exynos_cpuclk_cfg_data e3250_armclk_d[] __initconst = {
776 static const struct samsung_cpu_clock exynos3250_cpu_clks[] __initconst = {
802 static const struct samsung_cmu_info cmu_info __initconst = {  variable
855 static const unsigned long exynos3250_cmu_dmc_clk_regs[] __initconst = {
881 static const struct samsung_mux_clock dmc_mux_clks[] __initconst = {
900 static const struct samsung_div_clock dmc_div_clks[] __initconst = {
917 static const struct samsung_pll_clock exynos3250_dmc_plls[] __initconst = {
924 static const struct samsung_cmu_info dmc_cmu_info __initconst = {  variable
954 static const struct samsung_div_clock isp_div_clks[] __initconst = {
974 static const struct samsung_gate_clock isp_gate_clks[] __initconst = {
1070 static const struct samsung_cmu_info isp_cmu_info __initconst = {  variable
1086 static const struct of_device_id exynos3250_cmu_isp_of_match[] __initconst = {