Lines Matching full:cmu

43  * @np:			CMU device tree node with "reg" property (CMU addr)
77 * exynos_arm64_enable_bus_clk - Enable parent clock of specified CMU
81 * @np: CMU device tree node
82 * @cmu: CMU data
84 * Keep CMU parent clock running (needed for CMU registers access).
89 struct device_node *np, const struct samsung_cmu_info *cmu) in exynos_arm64_enable_bus_clk() argument
93 if (!cmu->clk_name) in exynos_arm64_enable_bus_clk()
99 parent_clk = clk_get(dev, cmu->clk_name); in exynos_arm64_enable_bus_clk()
104 parent_clk = of_clk_get_by_name(np, cmu->clk_name); in exynos_arm64_enable_bus_clk()
114 const struct samsung_cmu_info *cmu) in exynos_arm64_cmu_prepare_pm() argument
119 data->clk_save = samsung_clk_alloc_reg_dump(cmu->clk_regs, in exynos_arm64_cmu_prepare_pm()
120 cmu->nr_clk_regs); in exynos_arm64_cmu_prepare_pm()
124 data->nr_clk_save = cmu->nr_clk_regs; in exynos_arm64_cmu_prepare_pm()
125 data->clk_suspend = cmu->suspend_regs; in exynos_arm64_cmu_prepare_pm()
126 data->nr_clk_suspend = cmu->nr_suspend_regs; in exynos_arm64_cmu_prepare_pm()
154 * exynos_arm64_register_cmu - Register specified Exynos CMU domain
157 * @np: CMU device tree node
158 * @cmu: CMU data
160 * Register specified CMU domain, which includes next steps:
162 * 1. Enable parent clock of @cmu CMU
163 * 2. Set initial registers configuration for @cmu CMU clocks
164 * 3. Register @cmu CMU clocks using Samsung clock framework API
167 struct device_node *np, const struct samsung_cmu_info *cmu) in exynos_arm64_register_cmu() argument
175 err = exynos_arm64_enable_bus_clk(dev, np, cmu); in exynos_arm64_register_cmu()
178 __func__, cmu->clk_name, err); in exynos_arm64_register_cmu()
180 exynos_arm64_init_clocks(np, cmu->clk_regs, cmu->nr_clk_regs); in exynos_arm64_register_cmu()
181 samsung_cmu_register_one(np, cmu); in exynos_arm64_register_cmu()
185 * exynos_arm64_register_cmu_pm - Register Exynos CMU domain with PM support
198 const struct samsung_cmu_info *cmu; in exynos_arm64_register_cmu_pm() local
205 cmu = of_device_get_match_data(dev); in exynos_arm64_register_cmu_pm()
213 ret = exynos_arm64_cmu_prepare_pm(dev, cmu); in exynos_arm64_register_cmu_pm()
221 ret = exynos_arm64_enable_bus_clk(dev, NULL, cmu); in exynos_arm64_register_cmu_pm()
224 __func__, cmu->clk_name, ret); in exynos_arm64_register_cmu_pm()
227 exynos_arm64_init_clocks(np, cmu->clk_regs, cmu->nr_clk_regs); in exynos_arm64_register_cmu_pm()
233 data->ctx = samsung_clk_init(dev, reg_base, cmu->nr_clk_ids); in exynos_arm64_register_cmu_pm()
245 samsung_cmu_register_clocks(data->ctx, cmu); in exynos_arm64_register_cmu_pm()