clk/samsung/clk-cpu.c

119 	 * rate. Although there exist certain dividers inside the CPU  in exynos_cpuclk_recalc_rate()
133  * Helper function to set the 'safe' dividers for the CPU clock. The parameters
135  * dividers to be programmed.
170 	 * the values for DIV_COPY and DIV_HPM dividers need not be set.  in exynos_cpuclk_pre_rate_change()
183 	 * the armclk speed is more than the old_prate until the dividers are  in exynos_cpuclk_pre_rate_change()
184 	 * set.  Also workaround the issue of the dividers being set to lower  in exynos_cpuclk_pre_rate_change()
211 	/* alternate parent is active now. set the dividers */  in exynos_cpuclk_pre_rate_change()
261  * Helper function to set the 'safe' dividers for the CPU clock. The parameters
263  * dividers to be programmed.
305 	 * the armclk speed is more than the old_prate until the dividers are  in exynos5433_cpuclk_pre_rate_change()
306 	 * set.  Also workaround the issue of the dividers being set to lower  in exynos5433_cpuclk_pre_rate_change()
325 	/* alternate parent is active now. set the dividers */  in exynos5433_cpuclk_pre_rate_change()