Lines Matching refs:RK3588_CPULCLK_RATE
251 #define RK3588_CPULCLK_RATE(_prate, _apllcore, _seldsu, _divdsu) \ macro
384 RK3588_CPULCLK_RATE(2208000000, 1, 3, 1),
385 RK3588_CPULCLK_RATE(2184000000, 1, 3, 1),
386 RK3588_CPULCLK_RATE(2088000000, 1, 3, 1),
387 RK3588_CPULCLK_RATE(2040000000, 1, 3, 1),
388 RK3588_CPULCLK_RATE(2016000000, 1, 3, 1),
389 RK3588_CPULCLK_RATE(1992000000, 1, 3, 1),
390 RK3588_CPULCLK_RATE(1896000000, 1, 3, 1),
391 RK3588_CPULCLK_RATE(1800000000, 1, 3, 1),
392 RK3588_CPULCLK_RATE(1704000000, 0, 3, 1),
393 RK3588_CPULCLK_RATE(1608000000, 0, 3, 1),
394 RK3588_CPULCLK_RATE(1584000000, 0, 2, 1),
395 RK3588_CPULCLK_RATE(1560000000, 0, 2, 1),
396 RK3588_CPULCLK_RATE(1536000000, 0, 2, 1),
397 RK3588_CPULCLK_RATE(1512000000, 0, 2, 1),
398 RK3588_CPULCLK_RATE(1488000000, 0, 2, 1),
399 RK3588_CPULCLK_RATE(1464000000, 0, 2, 1),
400 RK3588_CPULCLK_RATE(1440000000, 0, 2, 1),
401 RK3588_CPULCLK_RATE(1416000000, 0, 2, 1),
402 RK3588_CPULCLK_RATE(1392000000, 0, 2, 1),
403 RK3588_CPULCLK_RATE(1368000000, 0, 2, 1),
404 RK3588_CPULCLK_RATE(1344000000, 0, 2, 1),
405 RK3588_CPULCLK_RATE(1320000000, 0, 2, 1),
406 RK3588_CPULCLK_RATE(1296000000, 0, 2, 1),
407 RK3588_CPULCLK_RATE(1272000000, 0, 2, 1),
408 RK3588_CPULCLK_RATE(1248000000, 0, 2, 1),
409 RK3588_CPULCLK_RATE(1224000000, 0, 2, 1),
410 RK3588_CPULCLK_RATE(1200000000, 0, 2, 1),
411 RK3588_CPULCLK_RATE(1104000000, 0, 2, 1),
412 RK3588_CPULCLK_RATE(1008000000, 0, 2, 1),
413 RK3588_CPULCLK_RATE(912000000, 0, 2, 1),
414 RK3588_CPULCLK_RATE(816000000, 0, 2, 1),
415 RK3588_CPULCLK_RATE(696000000, 0, 2, 1),
416 RK3588_CPULCLK_RATE(600000000, 0, 2, 1),
417 RK3588_CPULCLK_RATE(408000000, 0, 2, 1),
418 RK3588_CPULCLK_RATE(312000000, 0, 2, 1),
419 RK3588_CPULCLK_RATE(216000000, 0, 2, 1),
420 RK3588_CPULCLK_RATE(96000000, 0, 2, 1),