Lines Matching +full:reg +full:- +full:init
1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
13 u32 reg; member
24 unsigned int mask = GENMASK(mux->width - 1, 0); in rockchip_muxgrf_get_parent()
27 regmap_read(mux->regmap, mux->reg, &val); in rockchip_muxgrf_get_parent()
29 val >>= mux->shift; in rockchip_muxgrf_get_parent()
38 unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); in rockchip_muxgrf_set_parent()
42 val <<= mux->shift; in rockchip_muxgrf_set_parent()
44 if (mux->flags & CLK_MUX_HIWORD_MASK) in rockchip_muxgrf_set_parent()
45 return regmap_write(mux->regmap, mux->reg, val | (mask << 16)); in rockchip_muxgrf_set_parent()
47 return regmap_update_bits(mux->regmap, mux->reg, mask, val); in rockchip_muxgrf_set_parent()
58 int flags, struct regmap *regmap, int reg, in rockchip_clk_register_muxgrf() argument
62 struct clk_init_data init; in rockchip_clk_register_muxgrf() local
67 return ERR_PTR(-ENOTSUPP); in rockchip_clk_register_muxgrf()
72 return ERR_PTR(-ENOMEM); in rockchip_clk_register_muxgrf()
74 init.name = name; in rockchip_clk_register_muxgrf()
75 init.flags = flags; in rockchip_clk_register_muxgrf()
76 init.num_parents = num_parents; in rockchip_clk_register_muxgrf()
77 init.parent_names = parent_names; in rockchip_clk_register_muxgrf()
78 init.ops = &rockchip_muxgrf_clk_ops; in rockchip_clk_register_muxgrf()
80 muxgrf_clock->hw.init = &init; in rockchip_clk_register_muxgrf()
81 muxgrf_clock->regmap = regmap; in rockchip_clk_register_muxgrf()
82 muxgrf_clock->reg = reg; in rockchip_clk_register_muxgrf()
83 muxgrf_clock->shift = shift; in rockchip_clk_register_muxgrf()
84 muxgrf_clock->width = width; in rockchip_clk_register_muxgrf()
85 muxgrf_clock->flags = mux_flags; in rockchip_clk_register_muxgrf()
87 clk = clk_register(NULL, &muxgrf_clock->hw); in rockchip_clk_register_muxgrf()