Lines Matching refs:name
40 const char *name; member
75 void __iomem *base, const char *name) in sh73a0_cpg_register_clock() argument
83 if (!strcmp(name, "main")) { in sh73a0_cpg_register_clock()
89 } else if (!strncmp(name, "pll", 3)) { in sh73a0_cpg_register_clock()
91 u32 enable_bit = name[3] - '0'; in sh73a0_cpg_register_clock()
117 } else if (!strcmp(name, "dsi0phy") || !strcmp(name, "dsi1phy")) { in sh73a0_cpg_register_clock()
118 u32 phy_no = name[3] - '0'; in sh73a0_cpg_register_clock()
128 } else if (!strcmp(name, "z")) { in sh73a0_cpg_register_clock()
137 for (c = div4_clks; c->name; c++) { in sh73a0_cpg_register_clock()
138 if (!strcmp(name, c->name)) { in sh73a0_cpg_register_clock()
147 if (!c->name) in sh73a0_cpg_register_clock()
152 return clk_register_fixed_factor(NULL, name, parent_name, 0, in sh73a0_cpg_register_clock()
155 return clk_register_divider_table(NULL, name, parent_name, 0, in sh73a0_cpg_register_clock()
199 const char *name; in sh73a0_cpg_clocks_init() local
203 &name); in sh73a0_cpg_clocks_init()
205 clk = sh73a0_cpg_register_clock(np, cpg, base, name); in sh73a0_cpg_clocks_init()
208 __func__, np, name, PTR_ERR(clk)); in sh73a0_cpg_clocks_init()