394 	u32 t;  in rt5350_cpu_recalc_rate()  local
396 	regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG, &t);  in rt5350_cpu_recalc_rate()
397 	t = (t >> RT5350_SYSCFG0_CPUCLK_SHIFT) & RT5350_SYSCFG0_CPUCLK_MASK;  in rt5350_cpu_recalc_rate()
399 	switch (t) {  in rt5350_cpu_recalc_rate()
425 	u32 t;  in rt3352_cpu_recalc_rate()  local
427 	regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG, &t);  in rt3352_cpu_recalc_rate()
428 	t = (t >> RT3352_SYSCFG0_CPUCLK_SHIFT) & RT3352_SYSCFG0_CPUCLK_MASK;  in rt3352_cpu_recalc_rate()
430 	switch (t) {  in rt3352_cpu_recalc_rate()
445 	u32 t;  in rt305x_cpu_recalc_rate()  local
447 	regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG, &t);  in rt305x_cpu_recalc_rate()
448 	t = (t >> RT305X_SYSCFG_CPUCLK_SHIFT) & RT305X_SYSCFG_CPUCLK_MASK;  in rt305x_cpu_recalc_rate()
450 	switch (t) {  in rt305x_cpu_recalc_rate()
465 	u32 t;  in rt3883_cpu_recalc_rate()  local
467 	regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG, &t);  in rt3883_cpu_recalc_rate()
468 	t = (t >> RT3883_SYSCFG0_CPUCLK_SHIFT) & RT3883_SYSCFG0_CPUCLK_MASK;  in rt3883_cpu_recalc_rate()
470 	switch (t) {  in rt3883_cpu_recalc_rate()
490 	u32 t;  in rt3883_bus_recalc_rate()  local
492 	regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG, &t);  in rt3883_bus_recalc_rate()
493 	ddr2 = t & RT3883_SYSCFG0_DRAM_TYPE_DDR2;  in rt3883_bus_recalc_rate()
515 	u32 t;  in rt2880_cpu_recalc_rate()  local
517 	regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG, &t);  in rt2880_cpu_recalc_rate()
518 	t = (t >> RT2880_CONFIG_CPUCLK_SHIFT) & RT2880_CONFIG_CPUCLK_MASK;  in rt2880_cpu_recalc_rate()
520 	switch (t) {  in rt2880_cpu_recalc_rate()
536 	u64 t;  in mt7620_calc_rate()  local
538 	t = ref_rate;  in mt7620_calc_rate()
539 	t *= mul;  in mt7620_calc_rate()
540 	t = div_u64(t, div);  in mt7620_calc_rate()
542 	return t;  in mt7620_calc_rate()
552 	u32 t;  in mt7620_pll_recalc_rate()  local
556 	regmap_read(sysc, SYSC_REG_CPLL_CONFIG0, &t);  in mt7620_pll_recalc_rate()
557 	if (t & CPLL_CFG0_BYPASS_REF_CLK) {  in mt7620_pll_recalc_rate()
559 	} else if ((t & CPLL_CFG0_SW_CFG) == 0) {  in mt7620_pll_recalc_rate()
562 		mul = (t >> CPLL_CFG0_PLL_MULT_RATIO_SHIFT) &  in mt7620_pll_recalc_rate()
565 		if (t & CPLL_CFG0_LC_CURFCK)  in mt7620_pll_recalc_rate()
568 		div = (t >> CPLL_CFG0_PLL_DIV_RATIO_SHIFT) &  in mt7620_pll_recalc_rate()
576 	regmap_read(sysc, SYSC_REG_CPLL_CONFIG1, &t);  in mt7620_pll_recalc_rate()
577 	if (t & CPLL_CFG1_CPU_AUX1)  in mt7620_pll_recalc_rate()
580 	if (t & CPLL_CFG1_CPU_AUX0)  in mt7620_pll_recalc_rate()
591 	u32 t;  in mt7620_cpu_recalc_rate()  local
595 	regmap_read(sysc, SYSC_REG_CPU_SYS_CLKCFG, &t);  in mt7620_cpu_recalc_rate()
596 	mul = t & CPU_SYS_CLKCFG_CPU_FFRAC_MASK;  in mt7620_cpu_recalc_rate()
597 	div = (t >> CPU_SYS_CLKCFG_CPU_FDIV_SHIFT) &  in mt7620_cpu_recalc_rate()
615 	u32 t;  in mt7620_bus_recalc_rate()  local
619 	regmap_read(sysc, SYSC_REG_CPU_SYS_CLKCFG, &t);  in mt7620_bus_recalc_rate()
620 	ocp_ratio = (t >> CPU_SYS_CLKCFG_OCP_RATIO_SHIFT) &  in mt7620_bus_recalc_rate()
639 	u32 t;  in mt7620_periph_recalc_rate()  local
641 	regmap_read(sysc, SYSC_REG_CLKCFG0, &t);  in mt7620_periph_recalc_rate()
642 	if (t & CLKCFG0_PERI_CLK_SEL)  in mt7620_periph_recalc_rate()
653 	u32 t;  in mt76x8_xtal_recalc_rate()  local
655 	regmap_read(sysc, SYSC_REG_SYSTEM_CONFIG, &t);  in mt76x8_xtal_recalc_rate()
656 	if (t & MT7620_XTAL_FREQ_SEL)  in mt76x8_xtal_recalc_rate()
879 	u32 t;  in mtmips_clk_regs_init()  local
889 	regmap_read(priv->sysc, SYSC_REG_CPU_SYS_CLKCFG, &t);  in mtmips_clk_regs_init()
890 	t &= ~(CLKCFG_FDIV_MASK | CLKCFG_FFRAC_MASK);  in mtmips_clk_regs_init()
891 	t |= CLKCFG_FDIV_USB_VAL | CLKCFG_FFRAC_USB_VAL;  in mtmips_clk_regs_init()
892 	regmap_write(priv->sysc, SYSC_REG_CPU_SYS_CLKCFG, t);  in mtmips_clk_regs_init()