1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
172 	{ CLK_PERIPH("480000.wmac", "xtal") }
185 	{ CLK_PERIPH("10180000.wmac", "xtal") }
198 	{ CLK_PERIPH("10180000.wmac", "xtal") }
210 	{ CLK_PERIPH("10180000.wmac", "xtal") }
223 	{ CLK_PERIPH("10300000.wmac", "xtal") }
230 	struct clk_hw **hws = clk_data->hws;  in mtmips_register_pherip_clocks()
232 	size_t idx_start = priv->data->num_clk_base + priv->data->num_clk_fixed +  in mtmips_register_pherip_clocks()
233 			   priv->data->num_clk_factor;  in mtmips_register_pherip_clocks()
236 	for (i = 0; i < priv->data->num_clk_periph; i++) {  in mtmips_register_pherip_clocks()
239 		sclk = &priv->data->clk_periph[i];  in mtmips_register_pherip_clocks()
240 		ret = of_clk_hw_register(np, &sclk->hw);  in mtmips_register_pherip_clocks()
246 		hws[idx] = &sclk->hw;  in mtmips_register_pherip_clocks()
252 	while (--i >= 0) {  in mtmips_register_pherip_clocks()
253 		sclk = &priv->data->clk_periph[i];  in mtmips_register_pherip_clocks()
254 		clk_hw_unregister(&sclk->hw);  in mtmips_register_pherip_clocks()
282 	struct clk_hw **hws = clk_data->hws;  in mtmips_register_fixed_clocks()
284 	size_t idx_start = priv->data->num_clk_base;  in mtmips_register_fixed_clocks()
287 	for (i = 0; i < priv->data->num_clk_fixed; i++) {  in mtmips_register_fixed_clocks()
290 		sclk = &priv->data->clk_fixed[i];  in mtmips_register_fixed_clocks()
291 		sclk->hw = clk_hw_register_fixed_rate(NULL, sclk->name,  in mtmips_register_fixed_clocks()
292 						      sclk->parent, 0,  in mtmips_register_fixed_clocks()
293 						      sclk->rate);  in mtmips_register_fixed_clocks()
294 		if (IS_ERR(sclk->hw)) {  in mtmips_register_fixed_clocks()
295 			ret = PTR_ERR(sclk->hw);  in mtmips_register_fixed_clocks()
300 		hws[idx] = sclk->hw;  in mtmips_register_fixed_clocks()
306 	while (--i >= 0) {  in mtmips_register_fixed_clocks()
307 		sclk = &priv->data->clk_fixed[i];  in mtmips_register_fixed_clocks()
308 		clk_hw_unregister_fixed_rate(sclk->hw);  in mtmips_register_fixed_clocks()
333 	struct clk_hw **hws = clk_data->hws;  in mtmips_register_factor_clocks()
335 	size_t idx_start = priv->data->num_clk_base + priv->data->num_clk_fixed;  in mtmips_register_factor_clocks()
338 	for (i = 0; i < priv->data->num_clk_factor; i++) {  in mtmips_register_factor_clocks()
341 		sclk = &priv->data->clk_factor[i];  in mtmips_register_factor_clocks()
342 		sclk->hw = clk_hw_register_fixed_factor(NULL, sclk->name,  in mtmips_register_factor_clocks()
343 						  sclk->parent, sclk->flags,  in mtmips_register_factor_clocks()
344 						  sclk->mult, sclk->div);  in mtmips_register_factor_clocks()
345 		if (IS_ERR(sclk->hw)) {  in mtmips_register_factor_clocks()
346 			ret = PTR_ERR(sclk->hw);  in mtmips_register_factor_clocks()
351 		hws[idx] = sclk->hw;  in mtmips_register_factor_clocks()
357 	while (--i >= 0) {  in mtmips_register_factor_clocks()
358 		sclk = &priv->data->clk_factor[i];  in mtmips_register_factor_clocks()
359 		clk_hw_unregister_fixed_factor(sclk->hw);  in mtmips_register_factor_clocks()
379 	struct regmap *sysc = clk->priv->sysc;  in rt5350_xtal_recalc_rate()
393 	struct regmap *sysc = clk->priv->sysc;  in rt5350_cpu_recalc_rate()
424 	struct regmap *sysc = clk->priv->sysc;  in rt3352_cpu_recalc_rate()
444 	struct regmap *sysc = clk->priv->sysc;  in rt305x_cpu_recalc_rate()
464 	struct regmap *sysc = clk->priv->sysc;  in rt3883_cpu_recalc_rate()
488 	struct regmap *sysc = clk->priv->sysc;  in rt3883_bus_recalc_rate()
514 	struct regmap *sysc = clk->priv->sysc;  in rt2880_cpu_recalc_rate()
550 	struct regmap *sysc = clk->priv->sysc;  in mt7620_pll_recalc_rate()
590 	struct regmap *sysc = clk->priv->sysc;  in mt7620_cpu_recalc_rate()
614 	struct regmap *sysc = clk->priv->sysc;  in mt7620_bus_recalc_rate()
638 	struct regmap *sysc = clk->priv->sysc;  in mt7620_periph_recalc_rate()
652 	struct regmap *sysc = clk->priv->sysc;  in mt76x8_xtal_recalc_rate()
729 	struct clk_hw **hws = clk_data->hws;  in mtmips_register_clocks()
733 	for (i = 0; i < priv->data->num_clk_base; i++) {  in mtmips_register_clocks()
734 		sclk = &priv->data->clk_base[i];  in mtmips_register_clocks()
735 		sclk->priv = priv;  in mtmips_register_clocks()
736 		ret = of_clk_hw_register(np, &sclk->hw);  in mtmips_register_clocks()
742 		hws[i] = &sclk->hw;  in mtmips_register_clocks()
748 	while (--i >= 0) {  in mtmips_register_clocks()
749 		sclk = &priv->data->clk_base[i];  in mtmips_register_clocks()
750 		clk_hw_unregister(&sclk->hw);  in mtmips_register_clocks()
834 		.compatible = "ralink,rt2880-reset",
838 		.compatible = "ralink,rt2880-sysc",
842 		.compatible = "ralink,rt3050-sysc",
846 		.compatible = "ralink,rt3052-sysc",
850 		.compatible = "ralink,rt3352-sysc",
854 		.compatible = "ralink,rt3883-sysc",
858 		.compatible = "ralink,rt5350-sysc",
862 		.compatible = "ralink,mt7620-sysc",
866 		.compatible = "ralink,mt7628-sysc",
870 		.compatible = "ralink,mt7688-sysc",
881 	if (!of_device_is_compatible(node, "ralink,mt7620-sysc"))  in mtmips_clk_regs_init()
889 	regmap_read(priv->sysc, SYSC_REG_CPU_SYS_CLKCFG, &t);  in mtmips_clk_regs_init()
892 	regmap_write(priv->sysc, SYSC_REG_CPU_SYS_CLKCFG, t);  in mtmips_clk_regs_init()
907 	priv->sysc = syscon_node_to_regmap(node);  in mtmips_clk_init()
908 	if (IS_ERR(priv->sysc)) {  in mtmips_clk_init()
919 	data = match->data;  in mtmips_clk_init()
920 	priv->data = data;  in mtmips_clk_init()
921 	count = priv->data->num_clk_base + priv->data->num_clk_fixed +  in mtmips_clk_init()
922 		priv->data->num_clk_factor + priv->data->num_clk_periph;  in mtmips_clk_init()
951 	clk_data->num = count;  in mtmips_clk_init()
962 	for (i = 0; i < priv->data->num_clk_periph; i++) {  in mtmips_clk_init()
963 		struct mtmips_clk *sclk = &priv->data->clk_periph[i];  in mtmips_clk_init()
965 		clk_hw_unregister(&sclk->hw);  in mtmips_clk_init()
969 	for (i = 0; i < priv->data->num_clk_factor; i++) {  in mtmips_clk_init()
970 		struct mtmips_clk_factor *sclk = &priv->data->clk_factor[i];  in mtmips_clk_init()
972 		clk_hw_unregister_fixed_factor(sclk->hw);  in mtmips_clk_init()
976 	for (i = 0; i < priv->data->num_clk_fixed; i++) {  in mtmips_clk_init()
977 		struct mtmips_clk_fixed *sclk = &priv->data->clk_fixed[i];  in mtmips_clk_init()
979 		clk_hw_unregister_fixed_rate(sclk->hw);  in mtmips_clk_init()
983 	for (i = 0; i < priv->data->num_clk_base; i++) {  in mtmips_clk_init()
984 		struct mtmips_clk *sclk = &priv->data->clk_base[i];  in mtmips_clk_init()
986 		clk_hw_unregister(&sclk->hw);  in mtmips_clk_init()
995 CLK_OF_DECLARE_DRIVER(rt2880_clk, "ralink,rt2880-sysc", mtmips_clk_init);
996 CLK_OF_DECLARE_DRIVER(rt3050_clk, "ralink,rt3050-sysc", mtmips_clk_init);
997 CLK_OF_DECLARE_DRIVER(rt3052_clk, "ralink,rt3052-sysc", mtmips_clk_init);
998 CLK_OF_DECLARE_DRIVER(rt3352_clk, "ralink,rt3352-sysc", mtmips_clk_init);
999 CLK_OF_DECLARE_DRIVER(rt3883_clk, "ralink,rt3883-sysc", mtmips_clk_init);
1000 CLK_OF_DECLARE_DRIVER(rt5350_clk, "ralink,rt5350-sysc", mtmips_clk_init);
1001 CLK_OF_DECLARE_DRIVER(mt7620_clk, "ralink,mt7620-sysc", mtmips_clk_init);
1002 CLK_OF_DECLARE_DRIVER(mt7628_clk, "ralink,mt7628-sysc", mtmips_clk_init);
1003 CLK_OF_DECLARE_DRIVER(mt7688_clk, "ralink,mt7688-sysc", mtmips_clk_init);
1019 	struct regmap *sysc = data->sysc;  in mtmips_assert_device()
1028 	struct regmap *sysc = data->sysc;  in mtmips_deassert_device()
1048 	unsigned long id = reset_spec->args[0];  in mtmips_rst_xlate()
1050 	if (id == 0 || id >= rcdev->nr_resets)  in mtmips_rst_xlate()
1051 		return -EINVAL;  in mtmips_rst_xlate()
1068 		return -ENOMEM;  in mtmips_reset_init()
1070 	rst_data->sysc = sysc;  in mtmips_reset_init()
1071 	rst_data->rcdev.ops = &reset_ops;  in mtmips_reset_init()
1072 	rst_data->rcdev.owner = THIS_MODULE;  in mtmips_reset_init()
1073 	rst_data->rcdev.nr_resets = 32;  in mtmips_reset_init()
1074 	rst_data->rcdev.of_reset_n_cells = 1;  in mtmips_reset_init()
1075 	rst_data->rcdev.of_xlate = mtmips_rst_xlate;  in mtmips_reset_init()
1076 	rst_data->rcdev.of_node = dev_of_node(dev);  in mtmips_reset_init()
1078 	return devm_reset_controller_register(dev, &rst_data->rcdev);  in mtmips_reset_init()
1083 	struct device_node *np = pdev->dev.of_node;  in mtmips_clk_probe()
1084 	struct device *dev = &pdev->dev;  in mtmips_clk_probe()
1090 		return -ENOMEM;  in mtmips_clk_probe()
1092 	priv->sysc = syscon_node_to_regmap(np);  in mtmips_clk_probe()
1093 	if (IS_ERR(priv->sysc))  in mtmips_clk_probe()
1094 		return dev_err_probe(dev, PTR_ERR(priv->sysc),  in mtmips_clk_probe()
1097 	ret = mtmips_reset_init(dev, priv->sysc);  in mtmips_clk_probe()
1107 		.name = "mtmips-clk",