Lines Matching +full:0 +full:x42c
26 { 249600000, 2000000000, 0 },
30 .offset = 0x42c,
47 { P_BI_TCXO, 0 },
57 F(19200000, P_BI_TCXO, 1, 0, 0),
58 F(150000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
59 F(270000000, P_VIDEO_PLL0_OUT_MAIN, 2.5, 0, 0),
60 F(340000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
61 F(434000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
62 F(500000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
67 .cmd_rcgr = 0x7f0,
68 .mnd_width = 0,
82 .halt_reg = 0x9ec,
85 .enable_reg = 0x9ec,
86 .enable_mask = BIT(0),
95 .halt_reg = 0x890,
98 .enable_reg = 0x890,
99 .enable_mask = BIT(0),
113 .halt_reg = 0xa4c,
116 .enable_reg = 0xa4c,
117 .enable_mask = BIT(0),
126 .halt_reg = 0x9cc,
129 .enable_reg = 0x9cc,
130 .enable_mask = BIT(0),
139 .halt_reg = 0x850,
142 .enable_reg = 0x850,
143 .enable_mask = BIT(0),
157 .gdscr = 0x814,
165 .gdscr = 0x874,
192 .max_register = 0xb94,
219 video_pll0_config.l = 0x1f; in video_cc_sc7180_probe()
220 video_pll0_config.alpha = 0x4000; in video_cc_sc7180_probe()
221 video_pll0_config.user_ctl_val = 0x00000001; in video_cc_sc7180_probe()
222 video_pll0_config.user_ctl_hi_val = 0x00004805; in video_cc_sc7180_probe()
227 regmap_update_bits(regmap, 0x984, 0x1, 0x1); in video_cc_sc7180_probe()