clk/pxa/clk-pxa3xx.c

191 PARENTS(clk_pxa3xx_ac97) = { "spll_624mhz" };
203 PARENTS(clk_pxa3xx_smemc) = { "spll_624mhz" };
213 PARENTS(pxa3xx_pbus) = { "ring_osc_60mhz", "spll_624mhz" };
214 PARENTS(pxa3xx_32Khz_bus) = { "osc_32_768khz", "osc_32_768khz" };
215 PARENTS(pxa3xx_13MHz_bus) = { "osc_13mhz", "osc_13mhz" };
216 PARENTS(pxa3xx_ac97_bus) = { "ring_osc_60mhz", "ac97" };
217 PARENTS(pxa3xx_sbus) = { "ring_osc_60mhz", "system_bus" };
218 PARENTS(pxa3xx_smemcbus) = { "ring_osc_60mhz", "smemc" };
221 #define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp,	\  argument
223 	PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp,		\
230 #define PXA3XX_CKEN_1RATE(dev_id, con_id, bit, parents)			\  argument
231 	PXA_CKEN_1RATE(dev_id, con_id, bit, parents,			\
304 PARENTS(clk_pxa3xx_system_bus) = { "ring_osc_60mhz", "spll_624mhz" };
329 PARENTS(clk_pxa3xx_core) = { "ring_osc_60mhz", "run", "cpll" };
345 PARENTS(clk_pxa3xx_run) = { "cpll" };
363 PARENTS(clk_pxa3xx_cpll) = { "osc_13mhz" };