clk/pxa/clk-pxa27x.c

1 // SPDX-License-Identifier: GPL-2.0-only
7  * Heavily inspired from former arch/arm/mach-pxa/clock.c.
9 #include <linux/clk-provider.h>
17 #include <dt-bindings/clock/pxa-clock.h>
18 #include "clk-pxa.h"
19 #include "clk-pxa2xx.h"
67 	return (interval - 31) / 32;  in mdrefr_dri()
71  * Get the clock frequency as reflected by CCSR and the turbo flag.
91 		pr_info("Run Mode clock: %ld.%02ldMHz\n",  in pxa27x_get_clk_frequency_khz()
93 		pr_info("Turbo Mode clock: %ld.%02ldMHz\n",  in pxa27x_get_clk_frequency_khz()
132 	PXA27X_PBUS_CKEN("pxa2xx-uart.0", NULL, FFUART, 2, 42, 1),
133 	PXA27X_PBUS_CKEN("pxa2xx-uart.1", NULL, BTUART, 2, 42, 1),
134 	PXA27X_PBUS_CKEN("pxa2xx-uart.2", NULL, STUART, 2, 42, 1),
135 	PXA27X_PBUS_CKEN("pxa2xx-i2s", NULL, I2S, 2, 51, 0),
136 	PXA27X_PBUS_CKEN("pxa2xx-i2c.0", NULL, I2C, 2, 19, 0),
137 	PXA27X_PBUS_CKEN("pxa27x-udc", NULL, USB, 2, 13, 5),
138 	PXA27X_PBUS_CKEN("pxa2xx-mci.0", NULL, MMC, 2, 32, 0),
139 	PXA27X_PBUS_CKEN("pxa2xx-ir", "FICPCLK", FICP, 2, 13, 0),
140 	PXA27X_PBUS_CKEN("pxa27x-ohci", NULL, USBHOST, 2, 13, 0),
141 	PXA27X_PBUS_CKEN("pxa2xx-i2c.1", NULL, PWRI2C, 1, 24, 0),
142 	PXA27X_PBUS_CKEN("pxa27x-ssp.0", NULL, SSP1, 1, 24, 0),
143 	PXA27X_PBUS_CKEN("pxa27x-ssp.1", NULL, SSP2, 1, 24, 0),
144 	PXA27X_PBUS_CKEN("pxa27x-ssp.2", NULL, SSP3, 1, 24, 0),
145 	PXA27X_PBUS_CKEN("pxa27x-pwm.0", NULL, PWM0, 1, 24, 0),
146 	PXA27X_PBUS_CKEN("pxa27x-pwm.1", NULL, PWM1, 1, 24, 0),
154 	PXA27X_CKEN_1RATE("pxa27x-keypad", NULL, KEYPAD,
157 	PXA27X_CKEN_1RATE("pxa2xx-fb", NULL, LCD, pxa27x_lcd_bus_parents, 0),
158 	PXA27X_CKEN_1RATE("pxa27x-camera.0", NULL, CAMERA,
160 	PXA27X_CKEN_1RATE_AO("pxa2xx-pcmcia", NULL, MEMC,
171  * A = 0 => memory controller clock from table 3-7,
173  * Run mode frequency	= 13 MHz * L
174  * Turbo mode frequency = 13 MHz * L * N
179  * L = 16	  oscillator to run mode ratio
180  * 2N = 6	  2 * (turbo mode to run mode ratio)
183  * B = 1	  Fast bus mode
184  * HT = 0	  Half-Turbo mode
185  * T = 1	  Turbo mode
187  * For now, just support some of the combinations in table 3-7 of
239 		return -EINVAL;  in clk_pxa27x_cpll_set_rate()
321 		return -EINVAL;  in clk_pxa27x_core_set_parent()
439 	DUMMY_CLK(NULL, "pxa27x-gpio", "osc_32_768khz"),
440 	DUMMY_CLK(NULL, "pxa-rtc", "osc_32_768khz"),
441 	DUMMY_CLK(NULL, "sa1100-rtc", "osc_32_768khz"),
442 	DUMMY_CLK("UARTCLK", "pxa2xx-ir", "STUART"),
454 		name = d->dev_id ? d->dev_id : d->con_id;  in pxa27x_dummy_clocks_init()
455 		clk = clk_register_fixed_factor(NULL, name, d->parent, 0, 1, 1);  in pxa27x_dummy_clocks_init()
456 		clk_register_clkdev(clk, d->con_id, d->dev_id);  in pxa27x_dummy_clocks_init()
484 CLK_OF_DECLARE(pxa_clks, "marvell,pxa270-clocks", pxa27x_dt_clocks_init);