Lines Matching +full:power +full:- +full:gate

1 /* SPDX-License-Identifier: GPL-2.0-only */
92  *  - a low power parent
93  *  - a normal parent
95  *  +------------+     +-----------+
96  *  |  Low Power | --- | x mult_lp |
98  *  +------------+     +-----------+ \+-----+   +-----------+
99  *                                    | Mux |---| CKEN gate |
100  *  +------------+     +-----------+ /+-----+   +-----------+
101  *  | High Power |     | x mult_hp |/
102  *  |    Clock   | --- | / div_hp  |
103  *  +------------+     +-----------+
115 	struct clk_gate gate;  member
128 	  .gate = { .bit_idx = _cken_bit }, \