Lines Matching refs:ma35d1_clk_gate
432 static struct clk_hw *ma35d1_clk_gate(struct device *dev, const char *name, const char *parent, in ma35d1_clk_gate() function
489 hws[HXT_GATE] = ma35d1_clk_gate(dev, "hxt_gate", "hxt", in ma35d1_clocks_probe()
492 hws[LXT_GATE] = ma35d1_clk_gate(dev, "lxt_gate", "lxt", in ma35d1_clocks_probe()
495 hws[HIRC_GATE] = ma35d1_clk_gate(dev, "hirc_gate", "hirc", in ma35d1_clocks_probe()
498 hws[LIRC_GATE] = ma35d1_clk_gate(dev, "lirc_gate", "lirc", in ma35d1_clocks_probe()
551 hws[DDR0_GATE] = ma35d1_clk_gate(dev, "ddr0_gate", "ddrpll", in ma35d1_clocks_probe()
553 hws[DDR6_GATE] = ma35d1_clk_gate(dev, "ddr6_gate", "ddrpll", in ma35d1_clocks_probe()
561 hws[CAN0_GATE] = ma35d1_clk_gate(dev, "can0_gate", "can0_div", in ma35d1_clocks_probe()
568 hws[CAN1_GATE] = ma35d1_clk_gate(dev, "can1_gate", "can1_div", in ma35d1_clocks_probe()
575 hws[CAN2_GATE] = ma35d1_clk_gate(dev, "can2_gate", "can2_div", in ma35d1_clocks_probe()
582 hws[CAN3_GATE] = ma35d1_clk_gate(dev, "can3_gate", "can3_div", in ma35d1_clocks_probe()
587 hws[SDH0_GATE] = ma35d1_clk_gate(dev, "sdh0_gate", "sdh0_mux", in ma35d1_clocks_probe()
591 hws[SDH1_GATE] = ma35d1_clk_gate(dev, "sdh1_gate", "sdh1_mux", in ma35d1_clocks_probe()
594 hws[NAND_GATE] = ma35d1_clk_gate(dev, "nand_gate", "hclk1", in ma35d1_clocks_probe()
597 hws[USBD_GATE] = ma35d1_clk_gate(dev, "usbd_gate", "usbphy0", in ma35d1_clocks_probe()
599 hws[USBH_GATE] = ma35d1_clk_gate(dev, "usbh_gate", "usbphy0", in ma35d1_clocks_probe()
601 hws[HUSBH0_GATE] = ma35d1_clk_gate(dev, "husbh0_gate", "usbphy0", in ma35d1_clocks_probe()
603 hws[HUSBH1_GATE] = ma35d1_clk_gate(dev, "husbh1_gate", "usbphy0", in ma35d1_clocks_probe()
608 hws[GFX_GATE] = ma35d1_clk_gate(dev, "gfx_gate", "gfx_mux", in ma35d1_clocks_probe()
610 hws[VC8K_GATE] = ma35d1_clk_gate(dev, "vc8k_gate", "sysclk0_mux", in ma35d1_clocks_probe()
614 hws[DCU_GATE] = ma35d1_clk_gate(dev, "dcu_gate", "dcu_mux", in ma35d1_clocks_probe()
620 hws[EMAC0_GATE] = ma35d1_clk_gate(dev, "emac0_gate", "epll_div2", in ma35d1_clocks_probe()
622 hws[EMAC1_GATE] = ma35d1_clk_gate(dev, "emac1_gate", "epll_div2", in ma35d1_clocks_probe()
629 hws[CCAP0_GATE] = ma35d1_clk_gate(dev, "ccap0_gate", "ccap0_div", in ma35d1_clocks_probe()
636 hws[CCAP1_GATE] = ma35d1_clk_gate(dev, "ccap1_gate", "ccap1_div", in ma35d1_clocks_probe()
639 hws[PDMA0_GATE] = ma35d1_clk_gate(dev, "pdma0_gate", "hclk0", in ma35d1_clocks_probe()
641 hws[PDMA1_GATE] = ma35d1_clk_gate(dev, "pdma1_gate", "hclk0", in ma35d1_clocks_probe()
643 hws[PDMA2_GATE] = ma35d1_clk_gate(dev, "pdma2_gate", "hclk0", in ma35d1_clocks_probe()
645 hws[PDMA3_GATE] = ma35d1_clk_gate(dev, "pdma3_gate", "hclk0", in ma35d1_clocks_probe()
648 hws[WH0_GATE] = ma35d1_clk_gate(dev, "wh0_gate", "hclk0", in ma35d1_clocks_probe()
650 hws[WH1_GATE] = ma35d1_clk_gate(dev, "wh1_gate", "hclk0", in ma35d1_clocks_probe()
653 hws[HWS_GATE] = ma35d1_clk_gate(dev, "hws_gate", "hclk0", in ma35d1_clocks_probe()
656 hws[EBI_GATE] = ma35d1_clk_gate(dev, "ebi_gate", "hclk0", in ma35d1_clocks_probe()
659 hws[SRAM0_GATE] = ma35d1_clk_gate(dev, "sram0_gate", "hclk0", in ma35d1_clocks_probe()
661 hws[SRAM1_GATE] = ma35d1_clk_gate(dev, "sram1_gate", "hclk0", in ma35d1_clocks_probe()
664 hws[ROM_GATE] = ma35d1_clk_gate(dev, "rom_gate", "hclk0", in ma35d1_clocks_probe()
667 hws[TRA_GATE] = ma35d1_clk_gate(dev, "tra_gate", "hclk0", in ma35d1_clocks_probe()
672 hws[DBG_GATE] = ma35d1_clk_gate(dev, "dbg_gate", "hclk0", in ma35d1_clocks_probe()
679 hws[CKO_GATE] = ma35d1_clk_gate(dev, "cko_gate", "cko_div", in ma35d1_clocks_probe()
682 hws[GTMR_GATE] = ma35d1_clk_gate(dev, "gtmr_gate", "hirc", in ma35d1_clocks_probe()
685 hws[GPA_GATE] = ma35d1_clk_gate(dev, "gpa_gate", "hclk0", in ma35d1_clocks_probe()
687 hws[GPB_GATE] = ma35d1_clk_gate(dev, "gpb_gate", "hclk0", in ma35d1_clocks_probe()
689 hws[GPC_GATE] = ma35d1_clk_gate(dev, "gpc_gate", "hclk0", in ma35d1_clocks_probe()
691 hws[GPD_GATE] = ma35d1_clk_gate(dev, "gpd_gate", "hclk0", in ma35d1_clocks_probe()
693 hws[GPE_GATE] = ma35d1_clk_gate(dev, "gpe_gate", "hclk0", in ma35d1_clocks_probe()
695 hws[GPF_GATE] = ma35d1_clk_gate(dev, "gpf_gate", "hclk0", in ma35d1_clocks_probe()
697 hws[GPG_GATE] = ma35d1_clk_gate(dev, "gpg_gate", "hclk0", in ma35d1_clocks_probe()
699 hws[GPH_GATE] = ma35d1_clk_gate(dev, "gph_gate", "hclk0", in ma35d1_clocks_probe()
701 hws[GPI_GATE] = ma35d1_clk_gate(dev, "gpi_gate", "hclk0", in ma35d1_clocks_probe()
703 hws[GPJ_GATE] = ma35d1_clk_gate(dev, "gpj_gate", "hclk0", in ma35d1_clocks_probe()
705 hws[GPK_GATE] = ma35d1_clk_gate(dev, "gpk_gate", "hclk0", in ma35d1_clocks_probe()
707 hws[GPL_GATE] = ma35d1_clk_gate(dev, "gpl_gate", "hclk0", in ma35d1_clocks_probe()
709 hws[GPM_GATE] = ma35d1_clk_gate(dev, "gpm_gate", "hclk0", in ma35d1_clocks_probe()
711 hws[GPN_GATE] = ma35d1_clk_gate(dev, "gpn_gate", "hclk0", in ma35d1_clocks_probe()
717 hws[TMR0_GATE] = ma35d1_clk_gate(dev, "tmr0_gate", "tmr0_mux", in ma35d1_clocks_probe()
722 hws[TMR1_GATE] = ma35d1_clk_gate(dev, "tmr1_gate", "tmr1_mux", in ma35d1_clocks_probe()
727 hws[TMR2_GATE] = ma35d1_clk_gate(dev, "tmr2_gate", "tmr2_mux", in ma35d1_clocks_probe()
732 hws[TMR3_GATE] = ma35d1_clk_gate(dev, "tmr3_gate", "tmr3_mux", in ma35d1_clocks_probe()
737 hws[TMR4_GATE] = ma35d1_clk_gate(dev, "tmr4_gate", "tmr4_mux", in ma35d1_clocks_probe()
742 hws[TMR5_GATE] = ma35d1_clk_gate(dev, "tmr5_gate", "tmr5_mux", in ma35d1_clocks_probe()
747 hws[TMR6_GATE] = ma35d1_clk_gate(dev, "tmr6_gate", "tmr6_mux", in ma35d1_clocks_probe()
752 hws[TMR7_GATE] = ma35d1_clk_gate(dev, "tmr7_gate", "tmr7_mux", in ma35d1_clocks_probe()
757 hws[TMR8_GATE] = ma35d1_clk_gate(dev, "tmr8_gate", "tmr8_mux", in ma35d1_clocks_probe()
762 hws[TMR9_GATE] = ma35d1_clk_gate(dev, "tmr9_gate", "tmr9_mux", in ma35d1_clocks_probe()
767 hws[TMR10_GATE] = ma35d1_clk_gate(dev, "tmr10_gate", "tmr10_mux", in ma35d1_clocks_probe()
772 hws[TMR11_GATE] = ma35d1_clk_gate(dev, "tmr11_gate", "tmr11_mux", in ma35d1_clocks_probe()
780 hws[UART0_GATE] = ma35d1_clk_gate(dev, "uart0_gate", "uart0_div", in ma35d1_clocks_probe()
787 hws[UART1_GATE] = ma35d1_clk_gate(dev, "uart1_gate", "uart1_div", in ma35d1_clocks_probe()
794 hws[UART2_GATE] = ma35d1_clk_gate(dev, "uart2_gate", "uart2_div", in ma35d1_clocks_probe()
801 hws[UART3_GATE] = ma35d1_clk_gate(dev, "uart3_gate", "uart3_div", in ma35d1_clocks_probe()
808 hws[UART4_GATE] = ma35d1_clk_gate(dev, "uart4_gate", "uart4_div", in ma35d1_clocks_probe()
815 hws[UART5_GATE] = ma35d1_clk_gate(dev, "uart5_gate", "uart5_div", in ma35d1_clocks_probe()
822 hws[UART6_GATE] = ma35d1_clk_gate(dev, "uart6_gate", "uart6_div", in ma35d1_clocks_probe()
829 hws[UART7_GATE] = ma35d1_clk_gate(dev, "uart7_gate", "uart7_div", in ma35d1_clocks_probe()
836 hws[UART8_GATE] = ma35d1_clk_gate(dev, "uart8_gate", "uart8_div", in ma35d1_clocks_probe()
843 hws[UART9_GATE] = ma35d1_clk_gate(dev, "uart9_gate", "uart9_div", in ma35d1_clocks_probe()
850 hws[UART10_GATE] = ma35d1_clk_gate(dev, "uart10_gate", "uart10_div", in ma35d1_clocks_probe()
857 hws[UART11_GATE] = ma35d1_clk_gate(dev, "uart11_gate", "uart11_div", in ma35d1_clocks_probe()
864 hws[UART12_GATE] = ma35d1_clk_gate(dev, "uart12_gate", "uart12_div", in ma35d1_clocks_probe()
871 hws[UART13_GATE] = ma35d1_clk_gate(dev, "uart13_gate", "uart13_div", in ma35d1_clocks_probe()
878 hws[UART14_GATE] = ma35d1_clk_gate(dev, "uart14_gate", "uart14_div", in ma35d1_clocks_probe()
885 hws[UART15_GATE] = ma35d1_clk_gate(dev, "uart15_gate", "uart15_div", in ma35d1_clocks_probe()
892 hws[UART16_GATE] = ma35d1_clk_gate(dev, "uart16_gate", "uart16_div", in ma35d1_clocks_probe()
895 hws[RTC_GATE] = ma35d1_clk_gate(dev, "rtc_gate", "lxt", in ma35d1_clocks_probe()
897 hws[DDR_GATE] = ma35d1_clk_gate(dev, "ddr_gate", "ddrpll", in ma35d1_clocks_probe()
905 hws[KPI_GATE] = ma35d1_clk_gate(dev, "kpi_gate", "kpi_div", in ma35d1_clocks_probe()
908 hws[I2C0_GATE] = ma35d1_clk_gate(dev, "i2c0_gate", "pclk0", in ma35d1_clocks_probe()
910 hws[I2C1_GATE] = ma35d1_clk_gate(dev, "i2c1_gate", "pclk1", in ma35d1_clocks_probe()
912 hws[I2C2_GATE] = ma35d1_clk_gate(dev, "i2c2_gate", "pclk2", in ma35d1_clocks_probe()
914 hws[I2C3_GATE] = ma35d1_clk_gate(dev, "i2c3_gate", "pclk0", in ma35d1_clocks_probe()
916 hws[I2C4_GATE] = ma35d1_clk_gate(dev, "i2c4_gate", "pclk1", in ma35d1_clocks_probe()
918 hws[I2C5_GATE] = ma35d1_clk_gate(dev, "i2c5_gate", "pclk2", in ma35d1_clocks_probe()
923 hws[QSPI0_GATE] = ma35d1_clk_gate(dev, "qspi0_gate", "qspi0_mux", in ma35d1_clocks_probe()
927 hws[QSPI1_GATE] = ma35d1_clk_gate(dev, "qspi1_gate", "qspi1_mux", in ma35d1_clocks_probe()
935 hws[SMC0_GATE] = ma35d1_clk_gate(dev, "smc0_gate", "smc0_div", in ma35d1_clocks_probe()
942 hws[SMC1_GATE] = ma35d1_clk_gate(dev, "smc1_gate", "smc1_div", in ma35d1_clocks_probe()
947 hws[WDT0_GATE] = ma35d1_clk_gate(dev, "wdt0_gate", "wdt0_mux", in ma35d1_clocks_probe()
951 hws[WDT1_GATE] = ma35d1_clk_gate(dev, "wdt1_gate", "wdt1_mux", in ma35d1_clocks_probe()
955 hws[WDT2_GATE] = ma35d1_clk_gate(dev, "wdt2_gate", "wdt2_mux", in ma35d1_clocks_probe()
965 hws[EPWM0_GATE] = ma35d1_clk_gate(dev, "epwm0_gate", "pclk1", in ma35d1_clocks_probe()
967 hws[EPWM1_GATE] = ma35d1_clk_gate(dev, "epwm1_gate", "pclk2", in ma35d1_clocks_probe()
969 hws[EPWM2_GATE] = ma35d1_clk_gate(dev, "epwm2_gate", "pclk1", in ma35d1_clocks_probe()
974 hws[I2S0_GATE] = ma35d1_clk_gate(dev, "i2s0_gate", "i2s0_mux", in ma35d1_clocks_probe()
978 hws[I2S1_GATE] = ma35d1_clk_gate(dev, "i2s1_gate", "i2s1_mux", in ma35d1_clocks_probe()
981 hws[SSMCC_GATE] = ma35d1_clk_gate(dev, "ssmcc_gate", "pclk3", in ma35d1_clocks_probe()
983 hws[SSPCC_GATE] = ma35d1_clk_gate(dev, "sspcc_gate", "pclk3", in ma35d1_clocks_probe()
988 hws[SPI0_GATE] = ma35d1_clk_gate(dev, "spi0_gate", "spi0_mux", in ma35d1_clocks_probe()
992 hws[SPI1_GATE] = ma35d1_clk_gate(dev, "spi1_gate", "spi1_mux", in ma35d1_clocks_probe()
996 hws[SPI2_GATE] = ma35d1_clk_gate(dev, "spi2_gate", "spi2_mux", in ma35d1_clocks_probe()
1000 hws[SPI3_GATE] = ma35d1_clk_gate(dev, "spi3_gate", "spi3_mux", in ma35d1_clocks_probe()
1003 hws[ECAP0_GATE] = ma35d1_clk_gate(dev, "ecap0_gate", "pclk1", in ma35d1_clocks_probe()
1005 hws[ECAP1_GATE] = ma35d1_clk_gate(dev, "ecap1_gate", "pclk2", in ma35d1_clocks_probe()
1007 hws[ECAP2_GATE] = ma35d1_clk_gate(dev, "ecap2_gate", "pclk1", in ma35d1_clocks_probe()
1010 hws[QEI0_GATE] = ma35d1_clk_gate(dev, "qei0_gate", "pclk1", in ma35d1_clocks_probe()
1012 hws[QEI1_GATE] = ma35d1_clk_gate(dev, "qei1_gate", "pclk2", in ma35d1_clocks_probe()
1014 hws[QEI2_GATE] = ma35d1_clk_gate(dev, "qei2_gate", "pclk1", in ma35d1_clocks_probe()
1021 hws[ADC_GATE] = ma35d1_clk_gate(dev, "adc_gate", "adc_div", in ma35d1_clocks_probe()
1027 hws[EADC_GATE] = ma35d1_clk_gate(dev, "eadc_gate", "eadc_div", in ma35d1_clocks_probe()