Lines Matching refs:REG_CLK_SYSCLK1

24 #define REG_CLK_SYSCLK1		0x08  macro
640 clk_base + REG_CLK_SYSCLK1, 0); in ma35d1_clocks_probe()
642 clk_base + REG_CLK_SYSCLK1, 1); in ma35d1_clocks_probe()
644 clk_base + REG_CLK_SYSCLK1, 2); in ma35d1_clocks_probe()
646 clk_base + REG_CLK_SYSCLK1, 3); in ma35d1_clocks_probe()
649 clk_base + REG_CLK_SYSCLK1, 4); in ma35d1_clocks_probe()
651 clk_base + REG_CLK_SYSCLK1, 5); in ma35d1_clocks_probe()
654 clk_base + REG_CLK_SYSCLK1, 6); in ma35d1_clocks_probe()
657 clk_base + REG_CLK_SYSCLK1, 7); in ma35d1_clocks_probe()
660 clk_base + REG_CLK_SYSCLK1, 8); in ma35d1_clocks_probe()
662 clk_base + REG_CLK_SYSCLK1, 9); in ma35d1_clocks_probe()
665 clk_base + REG_CLK_SYSCLK1, 10); in ma35d1_clocks_probe()
668 clk_base + REG_CLK_SYSCLK1, 11); in ma35d1_clocks_probe()
673 clk_base + REG_CLK_SYSCLK1, 12); in ma35d1_clocks_probe()
680 clk_base + REG_CLK_SYSCLK1, 13); in ma35d1_clocks_probe()
683 clk_base + REG_CLK_SYSCLK1, 14); in ma35d1_clocks_probe()
686 clk_base + REG_CLK_SYSCLK1, 16); in ma35d1_clocks_probe()
688 clk_base + REG_CLK_SYSCLK1, 17); in ma35d1_clocks_probe()
690 clk_base + REG_CLK_SYSCLK1, 18); in ma35d1_clocks_probe()
692 clk_base + REG_CLK_SYSCLK1, 19); in ma35d1_clocks_probe()
694 clk_base + REG_CLK_SYSCLK1, 20); in ma35d1_clocks_probe()
696 clk_base + REG_CLK_SYSCLK1, 21); in ma35d1_clocks_probe()
698 clk_base + REG_CLK_SYSCLK1, 22); in ma35d1_clocks_probe()
700 clk_base + REG_CLK_SYSCLK1, 23); in ma35d1_clocks_probe()
702 clk_base + REG_CLK_SYSCLK1, 24); in ma35d1_clocks_probe()
704 clk_base + REG_CLK_SYSCLK1, 25); in ma35d1_clocks_probe()
706 clk_base + REG_CLK_SYSCLK1, 26); in ma35d1_clocks_probe()
708 clk_base + REG_CLK_SYSCLK1, 27); in ma35d1_clocks_probe()
710 clk_base + REG_CLK_SYSCLK1, 28); in ma35d1_clocks_probe()
712 clk_base + REG_CLK_SYSCLK1, 29); in ma35d1_clocks_probe()