Lines Matching refs:REG_CLK_APBCLK2
27 #define REG_CLK_APBCLK2 0x14 macro
975 clk_base + REG_CLK_APBCLK2, 0); in ma35d1_clocks_probe()
979 clk_base + REG_CLK_APBCLK2, 1); in ma35d1_clocks_probe()
982 clk_base + REG_CLK_APBCLK2, 2); in ma35d1_clocks_probe()
984 clk_base + REG_CLK_APBCLK2, 3); in ma35d1_clocks_probe()
989 clk_base + REG_CLK_APBCLK2, 4); in ma35d1_clocks_probe()
993 clk_base + REG_CLK_APBCLK2, 5); in ma35d1_clocks_probe()
997 clk_base + REG_CLK_APBCLK2, 6); in ma35d1_clocks_probe()
1001 clk_base + REG_CLK_APBCLK2, 7); in ma35d1_clocks_probe()
1004 clk_base + REG_CLK_APBCLK2, 8); in ma35d1_clocks_probe()
1006 clk_base + REG_CLK_APBCLK2, 9); in ma35d1_clocks_probe()
1008 clk_base + REG_CLK_APBCLK2, 10); in ma35d1_clocks_probe()
1011 clk_base + REG_CLK_APBCLK2, 12); in ma35d1_clocks_probe()
1013 clk_base + REG_CLK_APBCLK2, 13); in ma35d1_clocks_probe()
1015 clk_base + REG_CLK_APBCLK2, 14); in ma35d1_clocks_probe()
1022 clk_base + REG_CLK_APBCLK2, 24); in ma35d1_clocks_probe()
1028 clk_base + REG_CLK_APBCLK2, 25); in ma35d1_clocks_probe()