Lines Matching refs:REG_CLK_APBCLK1
26 #define REG_CLK_APBCLK1 0x10 macro
909 clk_base + REG_CLK_APBCLK1, 0); in ma35d1_clocks_probe()
911 clk_base + REG_CLK_APBCLK1, 1); in ma35d1_clocks_probe()
913 clk_base + REG_CLK_APBCLK1, 2); in ma35d1_clocks_probe()
915 clk_base + REG_CLK_APBCLK1, 3); in ma35d1_clocks_probe()
917 clk_base + REG_CLK_APBCLK1, 4); in ma35d1_clocks_probe()
919 clk_base + REG_CLK_APBCLK1, 5); in ma35d1_clocks_probe()
924 clk_base + REG_CLK_APBCLK1, 6); in ma35d1_clocks_probe()
928 clk_base + REG_CLK_APBCLK1, 7); in ma35d1_clocks_probe()
936 clk_base + REG_CLK_APBCLK1, 12); in ma35d1_clocks_probe()
943 clk_base + REG_CLK_APBCLK1, 13); in ma35d1_clocks_probe()
948 clk_base + REG_CLK_APBCLK1, 16); in ma35d1_clocks_probe()
952 clk_base + REG_CLK_APBCLK1, 17); in ma35d1_clocks_probe()
956 clk_base + REG_CLK_APBCLK1, 18); in ma35d1_clocks_probe()
966 clk_base + REG_CLK_APBCLK1, 24); in ma35d1_clocks_probe()
968 clk_base + REG_CLK_APBCLK1, 25); in ma35d1_clocks_probe()
970 clk_base + REG_CLK_APBCLK1, 26); in ma35d1_clocks_probe()