Lines Matching refs:REG_CLK_APBCLK0
25 #define REG_CLK_APBCLK0 0x0c macro
718 clk_base + REG_CLK_APBCLK0, 0); in ma35d1_clocks_probe()
723 clk_base + REG_CLK_APBCLK0, 1); in ma35d1_clocks_probe()
728 clk_base + REG_CLK_APBCLK0, 2); in ma35d1_clocks_probe()
733 clk_base + REG_CLK_APBCLK0, 3); in ma35d1_clocks_probe()
738 clk_base + REG_CLK_APBCLK0, 4); in ma35d1_clocks_probe()
743 clk_base + REG_CLK_APBCLK0, 5); in ma35d1_clocks_probe()
748 clk_base + REG_CLK_APBCLK0, 6); in ma35d1_clocks_probe()
753 clk_base + REG_CLK_APBCLK0, 7); in ma35d1_clocks_probe()
758 clk_base + REG_CLK_APBCLK0, 8); in ma35d1_clocks_probe()
763 clk_base + REG_CLK_APBCLK0, 9); in ma35d1_clocks_probe()
768 clk_base + REG_CLK_APBCLK0, 10); in ma35d1_clocks_probe()
773 clk_base + REG_CLK_APBCLK0, 11); in ma35d1_clocks_probe()
781 clk_base + REG_CLK_APBCLK0, 12); in ma35d1_clocks_probe()
788 clk_base + REG_CLK_APBCLK0, 13); in ma35d1_clocks_probe()
795 clk_base + REG_CLK_APBCLK0, 14); in ma35d1_clocks_probe()
802 clk_base + REG_CLK_APBCLK0, 15); in ma35d1_clocks_probe()
809 clk_base + REG_CLK_APBCLK0, 16); in ma35d1_clocks_probe()
816 clk_base + REG_CLK_APBCLK0, 17); in ma35d1_clocks_probe()
823 clk_base + REG_CLK_APBCLK0, 18); in ma35d1_clocks_probe()
830 clk_base + REG_CLK_APBCLK0, 19); in ma35d1_clocks_probe()
837 clk_base + REG_CLK_APBCLK0, 20); in ma35d1_clocks_probe()
844 clk_base + REG_CLK_APBCLK0, 21); in ma35d1_clocks_probe()
851 clk_base + REG_CLK_APBCLK0, 22); in ma35d1_clocks_probe()
858 clk_base + REG_CLK_APBCLK0, 23); in ma35d1_clocks_probe()
865 clk_base + REG_CLK_APBCLK0, 24); in ma35d1_clocks_probe()
872 clk_base + REG_CLK_APBCLK0, 25); in ma35d1_clocks_probe()
879 clk_base + REG_CLK_APBCLK0, 26); in ma35d1_clocks_probe()
886 clk_base + REG_CLK_APBCLK0, 27); in ma35d1_clocks_probe()
893 clk_base + REG_CLK_APBCLK0, 28); in ma35d1_clocks_probe()
896 clk_base + REG_CLK_APBCLK0, 29); in ma35d1_clocks_probe()
898 clk_base + REG_CLK_APBCLK0, 30); in ma35d1_clocks_probe()
906 clk_base + REG_CLK_APBCLK0, 31); in ma35d1_clocks_probe()