Lines Matching refs:mst_d_mclk

576 	AUD_MST_MCLK_MUX(mst_d_mclk, AUDIO_MCLK_D_CTRL);
589 	AUD_MST_MCLK_DIV(mst_d_mclk, AUDIO_MCLK_D_CTRL);
601 static struct clk_regmap mst_d_mclk =  variable
602 	AUD_MST_MCLK_GATE(mst_d_mclk, AUDIO_MCLK_D_CTRL);
764 	AUD_MST_MCLK_MUX(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
777 	AUD_MST_MCLK_DIV(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
790 	AUD_MST_MCLK_GATE(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
853 	[AUD_CLKID_MST_D_MCLK]		= &mst_d_mclk.hw,
983 	[AUD_CLKID_MST_D_MCLK]		= &mst_d_mclk.hw,
1275 	&mst_d_mclk,
1400 	&mst_d_mclk,