clk/mediatek/clk-mt7629.c

462 	MUX_GATE(CLK_TOP_AXI_SEL, "axi_sel", axi_parents,
464 	MUX_GATE(CLK_TOP_MEM_SEL, "mem_sel", mem_parents,
466 	MUX_GATE(CLK_TOP_DDRPHYCFG_SEL, "ddrphycfg_sel", ddrphycfg_parents,
468 	MUX_GATE(CLK_TOP_ETH_SEL, "eth_sel", eth_parents,
471 	MUX_GATE(CLK_TOP_PWM_SEL, "pwm_sel", pwm_parents,
473 	MUX_GATE(CLK_TOP_F10M_REF_SEL, "f10m_ref_sel", f10m_ref_parents,
475 	MUX_GATE(CLK_TOP_NFI_INFRA_SEL, "nfi_infra_sel", nfi_infra_parents,
477 	MUX_GATE(CLK_TOP_FLASH_SEL, "flash_sel", flash_parents,
480 	MUX_GATE(CLK_TOP_UART_SEL, "uart_sel", uart_parents,
482 	MUX_GATE(CLK_TOP_SPI0_SEL, "spi0_sel", spi0_parents,
484 	MUX_GATE(CLK_TOP_SPI1_SEL, "spi1_sel", spi1_parents,
486 	MUX_GATE(CLK_TOP_MSDC50_0_SEL, "msdc50_0_sel", uart_parents,
489 	MUX_GATE(CLK_TOP_MSDC30_0_SEL, "msdc30_0_sel", msdc30_0_parents,
491 	MUX_GATE(CLK_TOP_MSDC30_1_SEL, "msdc30_1_sel", msdc30_1_parents,
493 	MUX_GATE(CLK_TOP_AP2WBMCU_SEL, "ap2wbmcu_sel", ap2wbmcu_parents,
495 	MUX_GATE(CLK_TOP_AP2WBHIF_SEL, "ap2wbhif_sel", ap2wbmcu_parents,
498 	MUX_GATE(CLK_TOP_AUDIO_SEL, "audio_sel", audio_parents,
500 	MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
502 	MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
504 	MUX_GATE(CLK_TOP_SCP_SEL, "scp_sel", scp_parents,
507 	MUX_GATE(CLK_TOP_ATB_SEL, "atb_sel", atb_parents,
509 	MUX_GATE(CLK_TOP_HIF_SEL, "hif_sel", hif_parents,
511 	MUX_GATE(CLK_TOP_SATA_SEL, "sata_sel", sata_parents,
513 	MUX_GATE(CLK_TOP_U2_SEL, "usb20_sel", usb20_parents,
516 	MUX_GATE(CLK_TOP_AUD1_SEL, "aud1_sel", aud1_parents,
518 	MUX_GATE(CLK_TOP_AUD2_SEL, "aud2_sel", aud1_parents,
520 	MUX_GATE(CLK_TOP_IRRX_SEL, "irrx_sel", irrx_parents,
522 	MUX_GATE(CLK_TOP_IRTX_SEL, "irtx_sel", irrx_parents,
525 	MUX_GATE(CLK_TOP_SATA_MCU_SEL, "sata_mcu_sel", scp_parents,
527 	MUX_GATE(CLK_TOP_PCIE0_MCU_SEL, "pcie0_mcu_sel", scp_parents,
529 	MUX_GATE(CLK_TOP_PCIE1_MCU_SEL, "pcie1_mcu_sel", scp_parents,
531 	MUX_GATE(CLK_TOP_SSUSB_MCU_SEL, "ssusb_mcu_sel", scp_parents,
534 	MUX_GATE(CLK_TOP_CRYPTO_SEL, "crypto_sel", crypto_parents,
536 	MUX_GATE(CLK_TOP_SGMII_REF_1_SEL, "sgmii_ref_1_sel", f10m_ref_parents,
538 	MUX_GATE(CLK_TOP_10M_SEL, "gpt10m_sel", gpt10m_parents,