Lines Matching +full:protected +full:- +full:clocks
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
116 if (!core->rpm_enabled)
119 return pm_runtime_resume_and_get(core->dev);
124 if (!core->rpm_enabled)
127 pm_runtime_put_sync(core->dev);
131 * clk_pm_runtime_get_all() - Runtime "get" all clk provider devices
166 dev_name(failed->dev), failed->name);
186 * clk_pm_runtime_put_all() - Runtime "put" all clk provider devices
202 struct device *dev = core->dev;
205 core->rpm_enabled = true;
208 hlist_add_head(&core->rpm_node, &clk_rpm_list);
234 if (--prepare_refcnt)
274 if (--enable_refcnt) {
284 return core->protect_count;
292 * .is_prepared is optional for clocks that can prepare
295 if (!core->ops->is_prepared)
296 return core->prepare_count;
299 ret = core->ops->is_prepared(core->hw);
311 * .is_enabled is only mandatory for clocks that gate
314 if (!core->ops->is_enabled)
315 return core->enable_count;
327 if (core->rpm_enabled) {
328 pm_runtime_get_noresume(core->dev);
329 if (!pm_runtime_active(core->dev)) {
340 if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent)
341 if (!clk_core_is_enabled(core->parent)) {
346 ret = core->ops->is_enabled(core->hw);
348 if (core->rpm_enabled)
349 pm_runtime_put(core->dev);
358 return !clk ? NULL : clk->core->name;
364 return hw->core->name;
370 return !clk ? NULL : clk->core->hw;
376 return hw->core->num_parents;
382 return hw->core->parent ? hw->core->parent->hw : NULL;
392 if (!strcmp(core->name, name))
395 hlist_for_each_entry(child, &core->children, child_node) {
439 return -ENOENT;
444 return ERR_PTR(-ENOENT);
449 * clk_core_get - Find the clk_core parent of a clk
456 * node's 'clock-names' property or as the 'con_id' matching the device's
461 * clock-controller@c001 that has a clk_init_data::parent_data array
463 * clock-controller@f00abcd without needing to get the globally unique name of
466 * parent: clock-controller@f00abcd {
468 * #clock-cells = <0>;
471 * clock-controller@c001 {
473 * clocks = <&parent>;
474 * clock-names = "xtal";
475 * #clock-cells = <1>;
478 * Returns: -ENOENT when the provider can't be found or the clk doesn't
486 const char *name = core->parents[p_index].fw_name;
487 int index = core->parents[p_index].index;
488 struct clk_hw *hw = ERR_PTR(-ENOENT);
489 struct device *dev = core->dev;
491 struct device_node *np = core->of_node;
512 return hw->core;
517 struct clk_parent_map *entry = &core->parents[index];
520 if (entry->hw) {
521 parent = entry->hw->core;
524 if (PTR_ERR(parent) == -ENOENT && entry->name)
525 parent = clk_core_lookup(entry->name);
534 parent = ERR_PTR(-EPROBE_DEFER);
538 entry->core = parent;
544 if (!core || index >= core->num_parents || !core->parents)
547 if (!core->parents[index].core)
550 return core->parents[index].core;
558 parent = clk_core_get_parent_by_index(hw->core, index);
560 return !parent ? NULL : parent->hw;
566 return !clk ? 0 : clk->core->enable_count;
574 if (!core->num_parents || core->parent)
575 return core->rate;
587 return clk_core_get_rate_nolock(hw->core);
596 return core->accuracy;
601 return hw->core->flags;
607 return clk_core_is_prepared(hw->core);
613 return clk_core_rate_is_protected(hw->core);
619 return clk_core_is_enabled(hw->core);
628 return clk_core_is_enabled(clk->core);
636 return abs(now - rate) < abs(best - rate);
654 if (core->parent == parent)
657 for (i = 0; i < core->num_parents; i++) {
681 if (req->min_rate < old_req->min_rate)
682 req->min_rate = old_req->min_rate;
684 if (req->max_rate > old_req->max_rate)
685 req->max_rate = old_req->max_rate;
692 struct clk_core *core = hw->core;
693 struct clk_core *parent = core->parent;
697 if (core->flags & CLK_SET_RATE_PARENT) {
701 req->rate = 0;
706 req->rate);
723 req->best_parent_rate = best;
724 req->rate = best;
733 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
738 if (core->flags & CLK_SET_RATE_NO_REPARENT)
742 num_parents = core->num_parents;
750 if (core->flags & CLK_SET_RATE_PARENT) {
753 clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate);
768 if (mux_is_better_rate(req->rate, parent_rate,
776 return -EINVAL;
778 req->best_parent_hw = best_parent->hw;
779 req->best_parent_rate = best;
780 req->rate = best;
790 return !core ? NULL : core->hw->clk;
801 *min_rate = core->min_rate;
802 *max_rate = core->max_rate;
804 hlist_for_each_entry(clk_user, &core->clks, clks_node)
805 *min_rate = max(*min_rate, clk_user->min_rate);
807 hlist_for_each_entry(clk_user, &core->clks, clks_node)
808 *max_rate = min(*max_rate, clk_user->max_rate);
812 * clk_hw_get_rate_range() - returns the clock rate range for a hw clk
823 clk_core_get_boundaries(hw->core, min_rate, max_rate);
835 if (min_rate > core->max_rate || max_rate < core->min_rate)
838 hlist_for_each_entry(user, &core->clks, clks_node)
839 if (min_rate > user->max_rate || max_rate < user->min_rate)
848 hw->core->min_rate = min_rate;
849 hw->core->max_rate = max_rate;
854 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
862 * Returns: 0 on success, -EERROR value on error
879 * clk_hw_determine_rate_no_reparent - clk_ops::determine_rate implementation for a clk that doesn't reparent
888 * Returns: 0 on success, -EERROR value on error
906 if (WARN(core->protect_count == 0,
907 "%s already unprotected\n", core->name))
910 if (--core->protect_count > 0)
913 clk_core_rate_unprotect(core->parent);
923 return -EINVAL;
925 if (core->protect_count == 0)
928 ret = core->protect_count;
929 core->protect_count = 1;
936 * clk_rate_exclusive_put - release exclusivity over clock rate control
941 * clock which could result in a rate change or rate glitch. Exclusive clocks
943 * further up the parent chain of clocks. As a result, clocks up parent chain
964 if (WARN_ON(clk->exclusive_count <= 0))
967 clk_core_rate_unprotect(clk->core);
968 clk->exclusive_count--;
981 if (core->protect_count == 0)
982 clk_core_rate_protect(core->parent);
984 core->protect_count++;
998 core->protect_count = count;
1002 * clk_rate_exclusive_get - get exclusivity over the clk rate control
1007 * clock which could result in a rate change or rate glitch. Exclusive clocks
1009 * further up the parent chain of clocks. As a result, clocks up parent chain
1017 * Returns 0 on success, -EERROR otherwise
1025 clk_core_rate_protect(clk->core);
1026 clk->exclusive_count++;
1040 if (WARN(core->prepare_count == 0,
1041 "%s already unprepared\n", core->name))
1044 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
1045 "Unpreparing critical %s\n", core->name))
1048 if (core->flags & CLK_SET_RATE_GATE)
1051 if (--core->prepare_count > 0)
1054 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
1058 if (core->ops->unprepare)
1059 core->ops->unprepare(core->hw);
1062 clk_core_unprepare(core->parent);
1074 * clk_unprepare - undo preparation of a clock source
1089 clk_core_unprepare_lock(clk->core);
1102 if (core->prepare_count == 0) {
1107 ret = clk_core_prepare(core->parent);
1113 if (core->ops->prepare)
1114 ret = core->ops->prepare(core->hw);
1122 core->prepare_count++;
1131 if (core->flags & CLK_SET_RATE_GATE)
1136 clk_core_unprepare(core->parent);
1154 * clk_prepare - prepare a clock source
1163 * Returns 0 on success, -EERROR otherwise.
1170 return clk_core_prepare_lock(clk->core);
1181 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
1184 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
1185 "Disabling critical %s\n", core->name))
1188 if (--core->enable_count > 0)
1193 if (core->ops->disable)
1194 core->ops->disable(core->hw);
1198 clk_core_disable(core->parent);
1211 * clk_disable - gate a clock
1217 * SoC-internal clk which is controlled via simple register writes. In the
1227 clk_core_disable_lock(clk->core);
1240 if (WARN(core->prepare_count == 0,
1241 "Enabling unprepared %s\n", core->name))
1242 return -ESHUTDOWN;
1244 if (core->enable_count == 0) {
1245 ret = clk_core_enable(core->parent);
1252 if (core->ops->enable)
1253 ret = core->ops->enable(core->hw);
1258 clk_core_disable(core->parent);
1263 core->enable_count++;
1280 * clk_gate_restore_context - restore context for poweroff
1284 * the gate clocks based on the enable_count. This is done in cases
1287 * helps restore the state of gate clocks.
1291 struct clk_core *core = hw->core;
1293 if (core->enable_count)
1294 core->ops->enable(hw);
1296 core->ops->disable(hw);
1305 hlist_for_each_entry(child, &core->children, child_node) {
1311 if (core->ops && core->ops->save_context)
1312 ret = core->ops->save_context(core->hw);
1321 if (core->ops && core->ops->restore_context)
1322 core->ops->restore_context(core->hw);
1324 hlist_for_each_entry(child, &core->children, child_node)
1329 * clk_save_context - save clock context for poweroff
1357 * clk_restore_context - restore clock context after poweroff
1375 * clk_enable - ungate a clock
1380 * if the operation will never sleep. One example is a SoC-internal clk which
1384 * must be called before clk_enable. Returns 0 on success, -EERROR
1392 return clk_core_enable_lock(clk->core);
1397 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1401 * making clk_enable()/clk_disable() no-ops, false otherwise.
1413 return clk && !(clk->core->ops->enable && clk->core->ops->disable);
1444 hlist_for_each_entry(child, &core->children, child_node)
1447 if (core->prepare_count)
1450 if (core->flags & CLK_IGNORE_UNUSED)
1455 if (core->ops->unprepare_unused)
1456 core->ops->unprepare_unused(core->hw);
1457 else if (core->ops->unprepare)
1458 core->ops->unprepare(core->hw);
1470 hlist_for_each_entry(child, &core->children, child_node)
1473 if (core->flags & CLK_OPS_PARENT_ENABLE)
1474 clk_core_prepare_enable(core->parent);
1478 if (core->enable_count)
1481 if (core->flags & CLK_IGNORE_UNUSED)
1485 * some gate clocks have special needs during the disable-unused
1491 if (core->ops->disable_unused)
1492 core->ops->disable_unused(core->hw);
1493 else if (core->ops->disable)
1494 core->ops->disable(core->hw);
1500 if (core->flags & CLK_OPS_PARENT_ENABLE)
1501 clk_core_disable_unprepare(core->parent);
1518 pr_warn("clk: Not disabling unused clocks\n");
1522 pr_info("clk: Disabling unused clocks\n");
1564 * Some clock providers hand-craft their clk_rate_requests and
1571 if (!req->min_rate && !req->max_rate)
1573 __func__, core->name);
1575 req->rate = clamp(req->rate, req->min_rate, req->max_rate);
1579 * - if the provider is not protected at all
1580 * - if the calling consumer is the only one which has exclusivity
1584 req->rate = core->rate;
1585 } else if (core->ops->determine_rate) {
1586 return core->ops->determine_rate(core->hw, req);
1587 } else if (core->ops->round_rate) {
1588 rate = core->ops->round_rate(core->hw, req->rate,
1589 &req->best_parent_rate);
1593 req->rate = rate;
1595 return -EINVAL;
1611 req->max_rate = ULONG_MAX;
1616 req->core = core;
1617 req->rate = rate;
1618 clk_core_get_boundaries(core, &req->min_rate, &req->max_rate);
1620 parent = core->parent;
1622 req->best_parent_hw = parent->hw;
1623 req->best_parent_rate = parent->rate;
1625 req->best_parent_hw = NULL;
1626 req->best_parent_rate = 0;
1631 * clk_hw_init_rate_request - Initializes a clk_rate_request
1646 clk_core_init_rate_req(hw->core, req, rate);
1651 * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent
1670 clk_core_forward_rate_req(hw->core, old_req,
1671 parent->core, req,
1678 return core->ops->determine_rate || core->ops->round_rate;
1689 req->rate = 0;
1696 if (core->flags & CLK_SET_RATE_PARENT) {
1699 clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate);
1703 ret = clk_core_round_rate_nolock(core->parent, &parent_req);
1709 req->best_parent_rate = parent_req.rate;
1710 req->rate = parent_req.rate;
1715 req->rate = core->rate;
1720 * __clk_determine_rate - get the closest rate actually supported by a clock
1729 req->rate = 0;
1733 return clk_core_round_rate_nolock(hw->core, req);
1738 * clk_hw_round_rate() - round the given rate for a hw clk
1757 clk_core_init_rate_req(hw->core, &req, rate);
1761 ret = clk_core_round_rate_nolock(hw->core, &req);
1772 * clk_round_rate - round the given rate for a clk
1790 if (clk->exclusive_count)
1791 clk_core_rate_unprotect(clk->core);
1793 clk_core_init_rate_req(clk->core, &req, rate);
1797 ret = clk_core_round_rate_nolock(clk->core, &req);
1801 if (clk->exclusive_count)
1802 clk_core_rate_protect(clk->core);
1814 * __clk_notify - call clk notifier chain
1820 * Triggers a notifier call chain on the clk rate-change notification
1838 if (cn->clk->core == core) {
1839 cnd.clk = cn->clk;
1840 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1866 if (core->parent)
1867 parent_accuracy = core->parent->accuracy;
1869 if (core->ops->recalc_accuracy)
1870 core->accuracy = core->ops->recalc_accuracy(core->hw,
1873 core->accuracy = parent_accuracy;
1875 hlist_for_each_entry(child, &core->children, child_node)
1881 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1888 * clk_get_accuracy - return the accuracy of clk
1904 accuracy = clk_core_get_accuracy_recalc(clk->core);
1916 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1917 rate = core->ops->recalc_rate(core->hw, parent_rate);
1945 old_rate = core->rate;
1947 if (core->parent)
1948 parent_rate = core->parent->rate;
1950 core->rate = clk_recalc(core, parent_rate);
1952 core->req_rate = core->rate;
1958 if (core->notifier_count && msg)
1959 __clk_notify(core, msg, old_rate, core->rate);
1961 hlist_for_each_entry(child, &core->children, child_node)
1967 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1974 * clk_get_rate - return the rate of clk
1990 rate = clk_core_get_rate_recalc(clk->core);
2003 return -EINVAL;
2005 for (i = 0; i < core->num_parents; i++) {
2007 if (core->parents[i].core == parent)
2011 if (core->parents[i].core)
2015 if (core->parents[i].hw) {
2016 if (core->parents[i].hw == parent->hw)
2028 if (core->parents[i].name &&
2029 !strcmp(parent->name, core->parents[i].name))
2033 if (i == core->num_parents)
2034 return -EINVAL;
2036 core->parents[i].core = parent;
2041 * clk_hw_get_parent_index - return the index of the parent clock
2044 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
2052 return -EINVAL;
2054 return clk_fetch_parent_index(hw->core, parent->core);
2065 core->orphan = is_orphan;
2067 hlist_for_each_entry(child, &core->children, child_node)
2073 bool was_orphan = core->orphan;
2075 hlist_del(&core->child_node);
2078 bool becomes_orphan = new_parent->orphan;
2081 if (new_parent->new_child == core)
2082 new_parent->new_child = NULL;
2084 hlist_add_head(&core->child_node, &new_parent->children);
2089 hlist_add_head(&core->child_node, &clk_orphan_list);
2094 core->parent = new_parent;
2101 struct clk_core *old_parent = core->parent;
2124 if (core->flags & CLK_OPS_PARENT_ENABLE) {
2130 if (core->prepare_count) {
2151 if (core->prepare_count) {
2156 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
2157 if (core->flags & CLK_OPS_PARENT_ENABLE) {
2175 if (parent && core->ops->set_parent)
2176 ret = core->ops->set_parent(core->hw, p_index);
2204 * pre-rate change notifications and returns early if no clks in the
2221 if (core->notifier_count)
2222 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
2226 __func__, core->name, ret);
2230 hlist_for_each_entry(child, &core->children, child_node) {
2245 core->new_rate = new_rate;
2246 core->new_parent = new_parent;
2247 core->new_parent_index = p_index;
2249 core->new_child = NULL;
2250 if (new_parent && new_parent != core->parent)
2251 new_parent->new_child = core;
2253 hlist_for_each_entry(child, &core->children, child_node) {
2254 child->new_rate = clk_recalc(child, new_rate);
2255 clk_calc_subtree(child, child->new_rate, NULL, 0);
2280 parent = old_parent = core->parent;
2282 best_parent_rate = parent->rate;
2302 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
2306 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
2307 /* pass-through clock without adjustable parent */
2308 core->new_rate = core->rate;
2311 /* pass-through clock with adjustable parent */
2313 new_rate = parent->new_rate;
2317 /* some clocks must be gated to change parent */
2319 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
2321 __func__, core->name);
2326 if (parent && core->num_parents > 1) {
2330 __func__, parent->name, core->name);
2335 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2336 best_parent_rate != parent->rate)
2356 if (core->rate == core->new_rate)
2359 if (core->notifier_count) {
2360 ret = __clk_notify(core, event, core->rate, core->new_rate);
2365 hlist_for_each_entry(child, &core->children, child_node) {
2367 if (child->new_parent && child->new_parent != core)
2374 /* handle the new child who might not be in core->children yet */
2375 if (core->new_child) {
2376 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2398 old_rate = core->rate;
2400 if (core->new_parent) {
2401 parent = core->new_parent;
2402 best_parent_rate = core->new_parent->rate;
2403 } else if (core->parent) {
2404 parent = core->parent;
2405 best_parent_rate = core->parent->rate;
2411 if (core->flags & CLK_SET_RATE_UNGATE) {
2416 if (core->new_parent && core->new_parent != core->parent) {
2417 old_parent = __clk_set_parent_before(core, core->new_parent);
2418 trace_clk_set_parent(core, core->new_parent);
2420 if (core->ops->set_rate_and_parent) {
2422 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2424 core->new_parent_index);
2425 } else if (core->ops->set_parent) {
2426 core->ops->set_parent(core->hw, core->new_parent_index);
2429 trace_clk_set_parent_complete(core, core->new_parent);
2430 __clk_set_parent_after(core, core->new_parent, old_parent);
2433 if (core->flags & CLK_OPS_PARENT_ENABLE)
2436 trace_clk_set_rate(core, core->new_rate);
2438 if (!skip_set_rate && core->ops->set_rate)
2439 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2441 trace_clk_set_rate_complete(core, core->new_rate);
2443 core->rate = clk_recalc(core, best_parent_rate);
2445 if (core->flags & CLK_SET_RATE_UNGATE) {
2450 if (core->flags & CLK_OPS_PARENT_ENABLE)
2453 if (core->notifier_count && old_rate != core->rate)
2454 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2456 if (core->flags & CLK_RECALC_NEW_RATES)
2457 (void)clk_calc_new_rates(core, core->new_rate);
2463 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2465 if (child->new_parent && child->new_parent != core)
2470 /* handle the new child who might not be in core->children yet */
2471 if (core->new_child)
2472 clk_change_rate(core->new_child);
2523 /* fail on a direct rate set of a protected provider */
2525 return -EBUSY;
2530 return -EINVAL;
2540 fail_clk->name);
2542 ret = -EBUSY;
2549 core->req_rate = req_rate;
2557 * clk_set_rate - specify a new rate for clk
2573 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2575 * Returns 0 on success, -EERROR otherwise.
2587 if (clk->exclusive_count)
2588 clk_core_rate_unprotect(clk->core);
2590 ret = clk_core_set_rate_nolock(clk->core, rate);
2592 if (clk->exclusive_count)
2593 clk_core_rate_protect(clk->core);
2602 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2618 * Returns 0 on success, -EERROR otherwise.
2636 ret = clk_core_set_rate_nolock(clk->core, rate);
2638 clk_core_rate_protect(clk->core);
2639 clk->exclusive_count++;
2660 trace_clk_set_rate_range(clk->core, min, max);
2664 __func__, clk->core->name, clk->dev_id, clk->con_id,
2666 return -EINVAL;
2669 if (clk->exclusive_count)
2670 clk_core_rate_unprotect(clk->core);
2673 old_min = clk->min_rate;
2674 old_max = clk->max_rate;
2675 clk->min_rate = min;
2676 clk->max_rate = max;
2678 if (!clk_core_check_boundaries(clk->core, min, max)) {
2679 ret = -EINVAL;
2683 rate = clk->core->req_rate;
2684 if (clk->core->flags & CLK_GET_RATE_NOCACHE)
2685 rate = clk_core_get_rate_recalc(clk->core);
2698 * broken, clock protected, etc) but also because:
2699 * - round_rate() was not favorable and fell on the wrong
2701 * - the determine_rate() callback does not really check for
2705 ret = clk_core_set_rate_nolock(clk->core, rate);
2708 clk->min_rate = old_min;
2709 clk->max_rate = old_max;
2713 if (clk->exclusive_count)
2714 clk_core_rate_protect(clk->core);
2720 * clk_set_rate_range - set a rate range for a clock source
2745 * clk_set_min_rate - set a minimum clock rate for a clock source
2756 trace_clk_set_min_rate(clk->core, rate);
2758 return clk_set_rate_range(clk, rate, clk->max_rate);
2763 * clk_set_max_rate - set a maximum clock rate for a clock source
2774 trace_clk_set_max_rate(clk->core, rate);
2776 return clk_set_rate_range(clk, clk->min_rate, rate);
2781 * clk_get_parent - return the parent of a clk
2784 * Simply returns clk->parent. Returns NULL if clk is NULL.
2794 /* TODO: Create a per-user clk and change callers to call clk_put */
2795 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2806 if (core->num_parents > 1 && core->ops->get_parent)
2807 index = core->ops->get_parent(core->hw);
2825 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2829 * clk_has_parent - check if a clock is a possible parent for another
2840 /* NULL clocks should be nops, so return success if either is NULL. */
2844 return clk_core_has_parent(clk->core, parent->core);
2860 if (core->parent == parent)
2863 /* verify ops for multi-parent clks */
2864 if (core->num_parents > 1 && !core->ops->set_parent)
2865 return -EPERM;
2867 /* check that we are allowed to re-parent if the clock is in use */
2868 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2869 return -EBUSY;
2872 return -EBUSY;
2879 __func__, parent->name, core->name);
2882 p_rate = parent->rate;
2896 /* do the re-parent */
2915 return clk_core_set_parent_nolock(hw->core, parent->core);
2920 * clk_set_parent - switch the parent of a mux clk
2924 * Re-parent clk to use parent as its new input source. If clk is in
2934 * Returns 0 on success, -EERROR otherwise.
2945 if (clk->exclusive_count)
2946 clk_core_rate_unprotect(clk->core);
2948 ret = clk_core_set_parent_nolock(clk->core,
2949 parent ? parent->core : NULL);
2951 if (clk->exclusive_count)
2952 clk_core_rate_protect(clk->core);
2962 int ret = -EINVAL;
2970 return -EBUSY;
2974 if (core->ops->set_phase) {
2975 ret = core->ops->set_phase(core->hw, degrees);
2977 core->phase = degrees;
2986 * clk_set_phase - adjust the phase shift of a clock signal
2991 * degrees. Returns 0 on success, -EERROR otherwise.
2995 * phase locked-loop clock signal generators we may shift phase with
3019 if (clk->exclusive_count)
3020 clk_core_rate_unprotect(clk->core);
3022 ret = clk_core_set_phase_nolock(clk->core, degrees);
3024 if (clk->exclusive_count)
3025 clk_core_rate_protect(clk->core);
3038 if (!core->ops->get_phase)
3042 ret = core->ops->get_phase(core->hw);
3044 core->phase = ret;
3050 * clk_get_phase - return the phase shift of a clock signal
3054 * -EERROR.
3064 ret = clk_core_get_phase(clk->core);
3074 core->duty.num = 1;
3075 core->duty.den = 2;
3082 struct clk_duty *duty = &core->duty;
3085 if (!core->ops->get_duty_cycle)
3088 ret = core->ops->get_duty_cycle(core->hw, duty);
3093 if (duty->den == 0 || duty->num > duty->den) {
3094 ret = -EINVAL;
3109 if (core->parent &&
3110 core->flags & CLK_DUTY_CYCLE_PARENT) {
3111 ret = clk_core_update_duty_cycle_nolock(core->parent);
3112 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3131 return -EBUSY;
3135 if (!core->ops->set_duty_cycle)
3138 ret = core->ops->set_duty_cycle(core->hw, duty);
3140 memcpy(&core->duty, duty, sizeof(*duty));
3152 if (core->parent &&
3153 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
3154 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
3155 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3162 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
3182 return -EINVAL;
3189 if (clk->exclusive_count)
3190 clk_core_rate_unprotect(clk->core);
3192 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
3194 if (clk->exclusive_count)
3195 clk_core_rate_protect(clk->core);
3206 struct clk_duty *duty = &core->duty;
3213 ret = mult_frac(scale, duty->num, duty->den);
3221 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
3233 return clk_core_get_scaled_duty_cycle(clk->core, scale);
3238 * clk_is_match - check if two clk's point to the same hardware clock
3254 /* true if clk->core pointers match. Avoid dereferencing garbage */
3256 if (p->core == q->core)
3285 seq_printf(s, "%*s%-*s %-7d %-8d %-8d %-11lu %-10lu ",
3287 35 - level * 3, c->name,
3288 c->enable_count, c->prepare_count, c->protect_count,
3294 seq_printf(s, "%-5d", phase);
3296 seq_puts(s, "-----");
3298 seq_printf(s, " %-6d", clk_core_get_scaled_duty_cycle(c, 100000));
3300 if (c->ops->is_enabled)
3302 else if (!c->ops->enable)
3307 hlist_for_each_entry(clk_user, &c->clks, clks_node) {
3308 seq_printf(s, "%*s%-*s %-25s\n",
3311 clk_user->dev_id ? clk_user->dev_id : "deviceless",
3312 clk_user->con_id ? clk_user->con_id : "no_connection_id");
3326 hlist_for_each_entry(child, &c->children, child_node)
3333 struct hlist_head **lists = s->private;
3338 seq_puts(s, "---------------------------------------------------------------------------------------------------------------------------------------------\n");
3365 seq_printf(s, "\"%s\": { ", c->name);
3366 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3367 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
3368 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
3386 hlist_for_each_entry(child, &c->children, child_node) {
3398 struct hlist_head **lists = s->private;
3453 ret = clk_prepare_enable(core->hw->clk);
3455 clk_disable_unprepare(core->hw->clk);
3464 *val = core->enable_count && core->prepare_count;
3511 struct clk_core *core = s->private;
3512 unsigned long flags = core->flags;
3542 * 4. Fetch parent clock's clock-output-name if DT index was set
3550 seq_puts(s, parent->name);
3551 } else if (core->parents[i].name) {
3552 seq_puts(s, core->parents[i].name);
3553 } else if (core->parents[i].fw_name) {
3554 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3556 if (core->parents[i].index >= 0)
3557 name = of_clk_get_parent_name(core->of_node, core->parents[i].index);
3569 struct clk_core *core = s->private;
3572 for (i = 0; i < core->num_parents - 1; i++)
3583 struct clk_core *core = s->private;
3585 if (core->parent)
3586 seq_printf(s, "%s\n", core->parent->name);
3596 struct seq_file *s = file->private_data;
3597 struct clk_core *core = s->private;
3608 return -ENOENT;
3630 struct clk_core *core = s->private;
3631 struct clk_duty *duty = &core->duty;
3633 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3641 struct clk_core *core = s->private;
3655 struct clk_core *core = s->private;
3674 root = debugfs_create_dir(core->name, pdentry);
3675 core->dentry = root;
3681 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3682 debugfs_create_u32("clk_phase", 0444, root, &core->phase);
3684 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3685 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3686 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3687 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3694 if (core->num_parents > 1)
3699 if (core->num_parents > 0)
3703 if (core->num_parents > 1)
3707 if (core->ops->debug_init)
3708 core->ops->debug_init(core->hw, core->dentry);
3712 * clk_debug_register - add a clk node to the debugfs clk directory
3722 hlist_add_head(&core->debug_node, &clk_debug_list);
3729 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3733 * debugfs clk directory if clk->dentry points to debugfs created by
3739 hlist_del_init(&core->debug_node);
3740 debugfs_remove_recursive(core->dentry);
3741 core->dentry = NULL;
3746 * clk_debug_init - lazily populate the debugfs clk directory
3750 * populates the debugfs clk directory once at boot-time when we know that
3751 * debugfs is setup. It should only be called once at boot-time, all other clks
3810 * walk the list of orphan clocks and reparent any that newly finds a
3819 * clock. This is important for CLK_IS_CRITICAL clocks, which
3837 * 'req_rate' is set to something non-zero so that
3840 orphan->req_rate = orphan->rate;
3846 * __clk_core_init - initialize the data structures in a struct clk_core
3862 * Set hw->core after grabbing the prepare_lock to synchronize with
3863 * callers of clk_core_fill_parent_index() where we treat hw->core
3867 core->hw->core = core;
3874 if (clk_core_lookup(core->name)) {
3876 __func__, core->name);
3877 ret = -EEXIST;
3881 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3882 if (core->ops->set_rate &&
3883 !((core->ops->round_rate || core->ops->determine_rate) &&
3884 core->ops->recalc_rate)) {
3886 __func__, core->name);
3887 ret = -EINVAL;
3891 if (core->ops->set_parent && !core->ops->get_parent) {
3893 __func__, core->name);
3894 ret = -EINVAL;
3898 if (core->ops->set_parent && !core->ops->determine_rate) {
3900 __func__, core->name);
3901 ret = -EINVAL;
3905 if (core->num_parents > 1 && !core->ops->get_parent) {
3907 __func__, core->name);
3908 ret = -EINVAL;
3912 if (core->ops->set_rate_and_parent &&
3913 !(core->ops->set_parent && core->ops->set_rate)) {
3915 __func__, core->name);
3916 ret = -EINVAL;
3921 * optional platform-specific magic
3934 if (core->ops->init) {
3935 ret = core->ops->init(core->hw);
3940 parent = core->parent = __clk_init_parent(core);
3943 * Populate core->parent if parent has already been clk_core_init'd. If
3949 * clocks and re-parent any that are children of the clock currently
3953 hlist_add_head(&core->child_node, &parent->children);
3954 core->orphan = parent->orphan;
3955 } else if (!core->num_parents) {
3956 hlist_add_head(&core->child_node, &clk_root_list);
3957 core->orphan = false;
3959 hlist_add_head(&core->child_node, &clk_orphan_list);
3960 core->orphan = true;
3965 * .recalc_accuracy. For simple clocks and lazy developers the default
3970 if (core->ops->recalc_accuracy)
3971 core->accuracy = core->ops->recalc_accuracy(core->hw,
3974 core->accuracy = parent->accuracy;
3976 core->accuracy = 0;
3987 core->name);
3998 * simple clocks and lazy developers the default fallback is to use the
4002 if (core->ops->recalc_rate)
4003 rate = core->ops->recalc_rate(core->hw,
4006 rate = parent->rate;
4009 core->rate = core->req_rate = rate;
4012 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
4014 * reparenting clocks
4016 if (core->flags & CLK_IS_CRITICAL) {
4020 __func__, core->name);
4027 __func__, core->name);
4038 hlist_del_init(&core->child_node);
4039 core->hw->core = NULL;
4051 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
4058 hlist_add_head(&clk->clks_node, &core->clks);
4063 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
4069 hlist_del(&clk->clks_node);
4073 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
4087 return ERR_PTR(-ENOMEM);
4089 clk->core = core;
4090 clk->dev_id = dev_id;
4091 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
4092 clk->max_rate = ULONG_MAX;
4098 * free_clk - Free a clk consumer
4106 kfree_const(clk->con_id);
4132 core = hw->core;
4136 clk->dev = dev;
4138 if (!try_module_get(core->owner)) {
4140 return ERR_PTR(-ENOENT);
4143 kref_get(&core->ref);
4150 * clk_hw_get_clk - get clk consumer given an clk_hw
4161 struct device *dev = hw->core->dev;
4174 return -EINVAL;
4180 return -ENOMEM;
4188 u8 num_parents = init->num_parents;
4189 const char * const *parent_names = init->parent_names;
4190 const struct clk_hw **parent_hws = init->parent_hws;
4191 const struct clk_parent_data *parent_data = init->parent_data;
4199 * Avoid unnecessary string look-ups of clk_core's possible parents by
4203 core->parents = parents;
4205 return -ENOMEM;
4209 parent->index = -1;
4214 __func__, core->name);
4215 ret = clk_cpy_name(&parent->name, parent_names[i],
4218 parent->hw = parent_data[i].hw;
4219 parent->index = parent_data[i].index;
4220 ret = clk_cpy_name(&parent->fw_name,
4223 ret = clk_cpy_name(&parent->name,
4227 parent->hw = parent_hws[i];
4229 ret = -EINVAL;
4237 } while (--i >= 0);
4249 int i = core->num_parents;
4251 if (!core->num_parents)
4254 while (--i >= 0) {
4255 kfree_const(core->parents[i].name);
4256 kfree_const(core->parents[i].fw_name);
4259 kfree(core->parents);
4267 if (core->rpm_enabled) {
4269 hlist_del(&core->rpm_node);
4274 kfree_const(core->name);
4283 const struct clk_init_data *init = hw->init;
4288 * we catch use of hw->init early on in the core.
4290 hw->init = NULL;
4294 ret = -ENOMEM;
4298 kref_init(&core->ref);
4300 core->name = kstrdup_const(init->name, GFP_KERNEL);
4301 if (!core->name) {
4302 ret = -ENOMEM;
4306 if (WARN_ON(!init->ops)) {
4307 ret = -EINVAL;
4310 core->ops = init->ops;
4312 core->dev = dev;
4314 core->of_node = np;
4315 if (dev && dev->driver)
4316 core->owner = dev->driver->owner;
4317 core->hw = hw;
4318 core->flags = init->flags;
4319 core->num_parents = init->num_parents;
4320 core->min_rate = 0;
4321 core->max_rate = ULONG_MAX;
4327 INIT_HLIST_HEAD(&core->clks);
4333 hw->clk = alloc_clk(core, NULL, NULL);
4334 if (IS_ERR(hw->clk)) {
4335 ret = PTR_ERR(hw->clk);
4339 clk_core_link_consumer(core, hw->clk);
4343 return hw->clk;
4346 clk_core_unlink_consumer(hw->clk);
4349 free_clk(hw->clk);
4350 hw->clk = NULL;
4356 kref_put(&core->ref, __clk_release);
4362 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
4366 * @dev->parent if dev doesn't have a device node, or NULL if neither
4367 * @dev or @dev->parent have a device node.
4378 np = dev_of_node(dev->parent);
4384 * clk_register - allocate a new clock, register it and return an opaque cookie
4386 * @hw: link to hardware-specific clock data
4403 * clk_hw_register - register a clk_hw and return an error code
4405 * @hw: link to hardware-specific clock data
4420 * of_clk_hw_register - register a clk_hw and return an error code
4422 * @hw: link to hardware-specific clock data
4437 * Empty clk_ops for unregistered clocks. These are used temporarily
4443 return -ENXIO;
4454 return -ENXIO;
4459 return -ENXIO;
4465 return -ENXIO;
4484 for (i = 0; i < root->num_parents; i++)
4485 if (root->parents[i].core == target)
4486 root->parents[i].core = NULL;
4488 hlist_for_each_entry(child, &root->children, child_node)
4507 * clk_unregister - unregister a currently registered clock
4518 clk_debug_unregister(clk->core);
4522 ops = clk->core->ops;
4525 clk->core->name);
4534 clk->core->ops = &clk_nodrv_ops;
4537 if (ops->terminate)
4538 ops->terminate(clk->core->hw);
4540 if (!hlist_empty(&clk->core->children)) {
4545 hlist_for_each_entry_safe(child, t, &clk->core->children,
4550 clk_core_evict_parent_cache(clk->core);
4552 hlist_del_init(&clk->core->child_node);
4554 if (clk->core->prepare_count)
4556 __func__, clk->core->name);
4558 if (clk->core->protect_count)
4559 pr_warn("%s: unregistering protected clock: %s\n",
4560 __func__, clk->core->name);
4563 kref_put(&clk->core->ref, __clk_release);
4569 * clk_hw_unregister - unregister a currently registered clk_hw
4570 * @hw: hardware-specific clock data to unregister
4574 clk_unregister(hw->clk);
4589 * devm_clk_register - resource managed clk_register()
4591 * @hw: link to hardware-specific clock data
4595 * Clocks returned from this function are automatically clk_unregister()ed on
4605 return ERR_PTR(-ENOMEM);
4620 * devm_clk_hw_register - resource managed clk_hw_register()
4622 * @hw: link to hardware-specific clock data
4624 * Managed clk_hw_register(). Clocks registered by this function are
4635 return -ENOMEM;
4655 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4660 * Managed clk_hw_get_clk(). Clocks got with this function are
4674 WARN_ON_ONCE(dev != hw->core->dev);
4678 return ERR_PTR(-ENOMEM);
4710 if (WARN_ON(clk->exclusive_count)) {
4712 clk->core->protect_count -= (clk->exclusive_count - 1);
4713 clk_core_rate_unprotect(clk->core);
4714 clk->exclusive_count = 0;
4717 hlist_del(&clk->clks_node);
4720 if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX)
4725 owner = clk->core->owner;
4726 kref_put(&clk->core->ref, __clk_release);
4734 * clk_notifier_register - add a clk rate change notifier
4741 * re-enter into the clk framework by calling any top-level clk APIs;
4748 * clk_notifier_register() must be called from non-atomic context.
4749 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4756 int ret = -ENOMEM;
4759 return -EINVAL;
4765 if (cn->clk == clk)
4773 cn->clk = clk;
4774 srcu_init_notifier_head(&cn->notifier_head);
4776 list_add(&cn->node, &clk_notifier_list);
4779 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4781 clk->core->notifier_count++;
4791 * clk_notifier_unregister - remove a clk rate change notifier
4798 * Returns -EINVAL if called with null arguments; otherwise, passes
4804 int ret = -ENOENT;
4807 return -EINVAL;
4812 if (cn->clk == clk) {
4813 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4815 clk->core->notifier_count--;
4818 if (!cn->notifier_head.head) {
4819 srcu_cleanup_notifier_head(&cn->notifier_head);
4820 list_del(&cn->node);
4842 clk_notifier_unregister(devres->clk, devres->nb);
4855 return -ENOMEM;
4859 devres->clk = clk;
4860 devres->nb = nb;
4879 * struct of_clk_provider - Clock provider registration structure
4920 unsigned int idx = clkspec->args[0];
4922 if (idx >= clk_data->clk_num) {
4924 return ERR_PTR(-EINVAL);
4927 return clk_data->clks[idx];
4935 unsigned int idx = clkspec->args[0];
4937 if (idx >= hw_data->num) {
4939 return ERR_PTR(-EINVAL);
4942 return hw_data->hws[idx];
4947 * of_clk_add_provider() - Register a clock provider for a node
4967 return -ENOMEM;
4969 cp->node = of_node_get(np);
4970 cp->data = data;
4971 cp->get = clk_src_get;
4974 list_add(&cp->link, &of_clk_providers);
4984 fwnode_dev_initialized(&np->fwnode, true);
4991 * of_clk_add_hw_provider() - Register a clock provider for a node
5009 return -ENOMEM;
5011 cp->node = of_node_get(np);
5012 cp->data = data;
5013 cp->get_hw = get;
5016 list_add(&cp->link, &of_clk_providers);
5026 fwnode_dev_initialized(&np->fwnode, true);
5039 * for cases like MFD sub-devices where the child device driver wants to use
5040 * devm_*() APIs but not list the device in DT as a sub-node.
5046 np = dev->of_node;
5047 parent_np = dev->parent ? dev->parent->of_node : NULL;
5049 if (!of_property_present(np, "#clock-cells"))
5050 if (of_property_present(parent_np, "#clock-cells"))
5057 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
5063 * node or if the device node lacks of clock provider information (#clock-cells)
5065 * has the #clock-cells then it is used in registration. Provider is
5081 return -ENOMEM;
5097 * of_clk_del_provider() - Remove a previously registered clock provider
5109 if (cp->node == np) {
5110 list_del(&cp->link);
5111 fwnode_dev_initialized(&np->fwnode, false);
5112 of_node_put(cp->node);
5122 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
5128 * Parses a device node's "clocks" and "clock-names" properties to find the
5131 * parsing error. The @index argument is ignored if @name is non-NULL.
5135 * phandle1: clock-controller@1 {
5136 * #clock-cells = <2>;
5139 * phandle2: clock-controller@2 {
5140 * #clock-cells = <1>;
5143 * clock-consumer@3 {
5144 * clocks = <&phandle1 1 2 &phandle2 3>;
5145 * clock-names = "name1", "name2";
5148 * To get a device_node for `clock-controller@2' node you may call this
5151 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
5152 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
5153 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
5155 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
5156 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
5157 * the "clock-names" property of @np.
5162 int ret = -ENOENT;
5167 * For named clocks, first look up the name in the
5168 * "clock-names" property. If it cannot be found, then index
5170 * return -EINVAL.
5173 index = of_property_match_string(np, "clock-names", name);
5174 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
5183 * has a "clock-ranges" property, then we can try one of its
5184 * clocks.
5186 np = np->parent;
5187 if (np && !of_get_property(np, "clock-ranges", NULL))
5201 if (provider->get_hw)
5202 return provider->get_hw(clkspec, provider->data);
5204 clk = provider->get(clkspec, provider->data);
5214 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
5217 return ERR_PTR(-EINVAL);
5221 if (provider->node == clkspec->np) {
5233 * of_clk_get_from_provider() - Lookup a clock from a clock provider
5276 return __of_clk_get(np, index, np->full_name, NULL);
5281 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
5285 * This function parses the clocks and clock-names properties,
5292 return ERR_PTR(-ENOENT);
5294 return __of_clk_get(np, 0, np->full_name, name);
5299 * of_clk_get_parent_count() - Count the number of clocks a device node has
5302 * Returns: The number of clocks that are possible parents of this node
5308 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
5326 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
5335 * specified into an array offset for the clock-output-names property.
5337 of_property_for_each_u32(clkspec.np, "clock-indices", pv) {
5345 /* We went off the end of 'clock-indices' without finding it */
5346 if (of_property_present(clkspec.np, "clock-indices") && !found) {
5351 if (of_property_read_string_index(clkspec.np, "clock-output-names",
5358 * the clock as long as #clock-cells = 0.
5363 clk_name = clkspec.np->name;
5379 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
5425 if (PTR_ERR(clk) == -EPROBE_DEFER)
5441 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5444 * @flags: pointer to top-level framework flags
5446 * Detects if the clock-critical property exists and, if so, sets the
5450 * bindings, such as the one-clock-per-node style that are outdated.
5464 return -EINVAL;
5466 of_property_for_each_u32(np, "clock-critical", idx)
5474 * of_clk_init() - Scan and init clock providers from the DT
5493 /* First prepare the list of the clocks providers */
5504 list_del(&clk_provider->node);
5505 of_node_put(clk_provider->np);
5512 parent->clk_init_cb = match->data;
5513 parent->np = of_node_get(np);
5514 list_add_tail(&parent->node, &clk_provider_list);
5521 if (force || parent_ready(clk_provider->np)) {
5524 of_node_set_flag(clk_provider->np,
5527 clk_provider->clk_init_cb(clk_provider->np);
5528 of_clk_set_defaults(clk_provider->np, true);
5530 list_del(&clk_provider->node);
5531 of_node_put(clk_provider->np);