215 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pfd_mux_get_parent()  local
216 	const struct vc3_clk_data *pfd_mux = vc3->data;  in vc3_pfd_mux_get_parent()
219 	regmap_read(vc3->regmap, pfd_mux->offs, &src);  in vc3_pfd_mux_get_parent()
226 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pfd_mux_set_parent()  local
227 	const struct vc3_clk_data *pfd_mux = vc3->data;  in vc3_pfd_mux_set_parent()
229 	regmap_update_bits(vc3->regmap, pfd_mux->offs, pfd_mux->bitmsk,  in vc3_pfd_mux_set_parent()
243 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pfd_recalc_rate()  local
244 	const struct vc3_pfd_data *pfd = vc3->data;  in vc3_pfd_recalc_rate()
249 	regmap_read(vc3->regmap, pfd->offs, &prediv);  in vc3_pfd_recalc_rate()
254 			regmap_read(vc3->regmap, VC3_PLL1_CTRL_OUTDIV5, &premul);  in vc3_pfd_recalc_rate()
263 			regmap_read(vc3->regmap, VC3_PLL2_M_DIVIDER, &premul);  in vc3_pfd_recalc_rate()
290 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pfd_round_rate()  local
291 	const struct vc3_pfd_data *pfd = vc3->data;  in vc3_pfd_round_rate()
317 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pfd_set_rate()  local
318 	const struct vc3_pfd_data *pfd = vc3->data;  in vc3_pfd_set_rate()
324 		regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv1_bitmsk,  in vc3_pfd_set_rate()
326 		regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv2_bitmsk, 0);  in vc3_pfd_set_rate()
333 		regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv2_bitmsk,  in vc3_pfd_set_rate()
335 		regmap_update_bits(vc3->regmap, pfd->offs, pfd->mdiv1_bitmsk, 0);  in vc3_pfd_set_rate()
344 		regmap_write(vc3->regmap, pfd->offs, div);  in vc3_pfd_set_rate()
359 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pll_recalc_rate()  local
360 	const struct vc3_pll_data *pll = vc3->data;  in vc3_pll_recalc_rate()
364 	regmap_read(vc3->regmap, pll->int_div_msb_offs, &val);  in vc3_pll_recalc_rate()
366 	regmap_read(vc3->regmap, pll->int_div_lsb_offs, &val);  in vc3_pll_recalc_rate()
370 		regmap_read(vc3->regmap, VC3_PLL2_FB_FRC_DIV_MSB, &val);  in vc3_pll_recalc_rate()
372 		regmap_read(vc3->regmap, VC3_PLL2_FB_FRC_DIV_LSB, &val);  in vc3_pll_recalc_rate()
386 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pll_round_rate()  local
387 	const struct vc3_pll_data *pll = vc3->data;  in vc3_pll_round_rate()
395 	vc3->div_int = rate / *parent_rate;  in vc3_pll_round_rate()
398 		if (vc3->div_int > 0x7ff)  in vc3_pll_round_rate()
405 		vc3->div_frc = min_t(u64, div64_ul(div_frc, *parent_rate), U16_MAX);  in vc3_pll_round_rate()
407 			(vc3->div_int * VC3_2_POW_16 + vc3->div_frc) / VC3_2_POW_16);  in vc3_pll_round_rate()
409 		rate = *parent_rate * vc3->div_int;  in vc3_pll_round_rate()
418 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_pll_set_rate()  local
419 	const struct vc3_pll_data *pll = vc3->data;  in vc3_pll_set_rate()
422 	regmap_read(vc3->regmap, pll->int_div_msb_offs, &val);  in vc3_pll_set_rate()
423 	val = (val & 0xf8) | ((vc3->div_int >> 8) & 0x7);  in vc3_pll_set_rate()
424 	regmap_write(vc3->regmap, pll->int_div_msb_offs, val);  in vc3_pll_set_rate()
425 	regmap_write(vc3->regmap, pll->int_div_lsb_offs, vc3->div_int & 0xff);  in vc3_pll_set_rate()
428 		regmap_write(vc3->regmap, VC3_PLL2_FB_FRC_DIV_MSB,  in vc3_pll_set_rate()
429 			     vc3->div_frc >> 8);  in vc3_pll_set_rate()
430 		regmap_write(vc3->regmap, VC3_PLL2_FB_FRC_DIV_LSB,  in vc3_pll_set_rate()
431 			     vc3->div_frc & 0xff);  in vc3_pll_set_rate()
445 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_div_mux_get_parent()  local
446 	const struct vc3_clk_data *div_mux = vc3->data;  in vc3_div_mux_get_parent()
449 	regmap_read(vc3->regmap, div_mux->offs, &src);  in vc3_div_mux_get_parent()
456 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_div_mux_set_parent()  local
457 	const struct vc3_clk_data *div_mux = vc3->data;  in vc3_div_mux_set_parent()
459 	regmap_update_bits(vc3->regmap, div_mux->offs, div_mux->bitmsk,  in vc3_div_mux_set_parent()
486 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_div_recalc_rate()  local
487 	const struct vc3_div_data *div_data = vc3->data;  in vc3_div_recalc_rate()
490 	regmap_read(vc3->regmap, div_data->offs, &val);  in vc3_div_recalc_rate()
501 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_div_round_rate()  local
502 	const struct vc3_div_data *div_data = vc3->data;  in vc3_div_round_rate()
507 		regmap_read(vc3->regmap, div_data->offs, &bestdiv);  in vc3_div_round_rate()
521 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_div_set_rate()  local
522 	const struct vc3_div_data *div_data = vc3->data;  in vc3_div_set_rate()
527 	regmap_update_bits(vc3->regmap, div_data->offs,  in vc3_div_set_rate()
563 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_clk_mux_get_parent()  local
564 	const struct vc3_clk_data *clk_mux = vc3->data;  in vc3_clk_mux_get_parent()
567 	regmap_read(vc3->regmap, clk_mux->offs, &val);  in vc3_clk_mux_get_parent()
574 	struct vc3_hw_data *vc3 = container_of(hw, struct vc3_hw_data, hw);  in vc3_clk_mux_set_parent()  local
575 	const struct vc3_clk_data *clk_mux = vc3->data;  in vc3_clk_mux_set_parent()
577 	regmap_update_bits(vc3->regmap, clk_mux->offs,  in vc3_clk_mux_set_parent()