Lines Matching defs:_name
1166 #define GATE(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ argument
1180 #define FIXED_FACTOR(_id, _name, _parent, _flags, _mult, _div)\ argument
1193 #define DIV_TABLE(_id, _name, _parent, _flags, _offset, _shift, _width,\ argument
1210 #define DIV(_id, _name, _parent, _flags, _offset, _shift, _width, _div_flags)\ argument
1214 #define MUX(_id, _name, _parents, _flags, _offset, _shift, _width, _mux_flags)\ argument
1230 #define PLL(_id, _name, _parents, _flags, _offset_p, _offset_mux)\ argument
1244 #define STM32_CKTIM(_name, _parent, _flags, _offset_apbdiv, _offset_timpre)\ argument
1257 #define STM32_TIM(_id, _name, _parent, _offset_set, _bit_idx)\ argument
1262 #define STM32_GATE(_id, _name, _parent, _flags, _gate)\ argument
1272 #define STM32_GATE_PDATA(_id, _name, _parent, _flags, _gate)\ argument
1307 #define GATE_MP1(_id, _name, _parent, _flags, _offset, _bit_idx, _gate_flags)\ argument
1311 #define MGATE_MP1(_id, _name, _parent, _flags, _mgate)\ argument
1315 #define MGATE_MP1_PDATA(_id, _name, _parent, _flags, _mgate)\ argument
1364 #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ argument
1379 #define PCLK(_id, _name, _parent, _flags, _mgate)\ argument
1382 #define PCLK_PDATA(_id, _name, _parent, _flags, _mgate)\ argument
1385 #define KCLK(_id, _name, _parents, _flags, _mgate, _mmux)\ argument