Lines Matching refs:output
137 #define SI5341_OUT_CONFIG(output) \ argument
138 ((output)->data->reg_output_offset[(output)->index])
139 #define SI5341_OUT_FORMAT(output) (SI5341_OUT_CONFIG(output) + 1) argument
140 #define SI5341_OUT_CM(output) (SI5341_OUT_CONFIG(output) + 2) argument
141 #define SI5341_OUT_MUX_SEL(output) (SI5341_OUT_CONFIG(output) + 3) argument
142 #define SI5341_OUT_R_REG(output) \ argument
143 ((output)->data->reg_rdiv_offset[(output)->index])
750 struct clk_si5341_output *output = to_clk_si5341_output(hw); in si5341_output_clk_is_on() local
754 err = regmap_read(output->data->regmap, in si5341_output_clk_is_on()
755 SI5341_OUT_CONFIG(output), &val); in si5341_output_clk_is_on()
766 struct clk_si5341_output *output = to_clk_si5341_output(hw); in si5341_output_clk_unprepare() local
768 regmap_update_bits(output->data->regmap, in si5341_output_clk_unprepare()
769 SI5341_OUT_CONFIG(output), in si5341_output_clk_unprepare()
771 regmap_update_bits(output->data->regmap, in si5341_output_clk_unprepare()
772 SI5341_OUT_CONFIG(output), in si5341_output_clk_unprepare()
779 struct clk_si5341_output *output = to_clk_si5341_output(hw); in si5341_output_clk_prepare() local
782 err = regmap_update_bits(output->data->regmap, in si5341_output_clk_prepare()
783 SI5341_OUT_CONFIG(output), in si5341_output_clk_prepare()
788 return regmap_update_bits(output->data->regmap, in si5341_output_clk_prepare()
789 SI5341_OUT_CONFIG(output), in si5341_output_clk_prepare()
796 struct clk_si5341_output *output = to_clk_si5341_output(hw); in si5341_output_clk_recalc_rate() local
802 err = regmap_read(output->data->regmap, in si5341_output_clk_recalc_rate()
803 SI5341_OUT_CONFIG(output), &val); in si5341_output_clk_recalc_rate()
811 err = regmap_bulk_read(output->data->regmap, in si5341_output_clk_recalc_rate()
812 SI5341_OUT_R_REG(output), r, 3); in si5341_output_clk_recalc_rate()
868 struct clk_si5341_output *output = to_clk_si5341_output(hw); in si5341_output_clk_set_rate() local
887 err = regmap_update_bits(output->data->regmap, in si5341_output_clk_set_rate()
888 SI5341_OUT_CONFIG(output), in si5341_output_clk_set_rate()
898 return regmap_bulk_write(output->data->regmap, in si5341_output_clk_set_rate()
899 SI5341_OUT_R_REG(output), r, 3); in si5341_output_clk_set_rate()
902 static int si5341_output_reparent(struct clk_si5341_output *output, u8 index) in si5341_output_reparent() argument
904 return regmap_update_bits(output->data->regmap, in si5341_output_reparent()
905 SI5341_OUT_MUX_SEL(output), 0x07, index); in si5341_output_reparent()
910 struct clk_si5341_output *output = to_clk_si5341_output(hw); in si5341_output_set_parent() local
912 if (index >= output->data->num_synth) in si5341_output_set_parent()
915 return si5341_output_reparent(output, index); in si5341_output_set_parent()
920 struct clk_si5341_output *output = to_clk_si5341_output(hw); in si5341_output_get_parent() local
923 regmap_read(output->data->regmap, SI5341_OUT_MUX_SEL(output), &val); in si5341_output_get_parent()