Lines Matching +full:keep +full:- +full:pll +full:- +full:enabled
1 // SPDX-License-Identifier: GPL-2.0
2 #include <linux/clk-provider.h>
33 const char *name = np->name; in of_sama5d2_clk_audio_pll_frac_setup()
53 "atmel,sama5d2-clk-audio-pll-frac",
59 const char *name = np->name; in of_sama5d2_clk_audio_pll_pad_setup()
79 "atmel,sama5d2-clk-audio-pll-pad",
85 const char *name = np->name; in of_sama5d2_clk_audio_pll_pmc_setup()
105 "atmel,sama5d2-clk-audio-pll-pmc",
161 if (of_property_read_string(np, "clock-output-names", &name)) in of_sama5d2_clk_generated_setup()
162 name = gcknp->name; in of_sama5d2_clk_generated_setup()
164 of_at91_get_clk_range(gcknp, "atmel,clk-output-range", in of_sama5d2_clk_generated_setup()
167 if (of_device_is_compatible(np, "atmel,sama5d2-clk-generated") && in of_sama5d2_clk_generated_setup()
183 CLK_OF_DECLARE(of_sama5d2_clk_generated_setup, "atmel,sama5d2-clk-generated",
191 const char *name = np->name; in of_sama5d4_clk_h32mx_setup()
210 CLK_OF_DECLARE(of_sama5d4_clk_h32mx_setup, "atmel,sama5d4-clk-h32mx",
226 regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr"); in of_sama5d2_clk_i2s_mux_setup()
241 hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name, in of_sama5d2_clk_i2s_mux_setup()
249 CLK_OF_DECLARE(sama5d2_clk_i2s_mux, "atmel,sama5d2-clk-i2s-mux",
256 const char *name = np->name; in of_at91rm9200_clk_main_osc_setup()
262 of_property_read_string(np, "clock-output-names", &name); in of_at91rm9200_clk_main_osc_setup()
263 bypass = of_property_read_bool(np, "atmel,osc-bypass"); in of_at91rm9200_clk_main_osc_setup()
278 CLK_OF_DECLARE(at91rm9200_clk_main_osc, "atmel,at91rm9200-clk-main-osc",
286 const char *name = np->name; in of_at91sam9x5_clk_main_rc_osc_setup()
290 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9x5_clk_main_rc_osc_setup()
291 of_property_read_u32(np, "clock-frequency", &frequency); in of_at91sam9x5_clk_main_rc_osc_setup()
292 of_property_read_u32(np, "clock-accuracy", &accuracy); in of_at91sam9x5_clk_main_rc_osc_setup()
306 CLK_OF_DECLARE(at91sam9x5_clk_main_rc_osc, "atmel,at91sam9x5-clk-main-rc-osc",
313 const char *name = np->name; in of_at91rm9200_clk_main_setup()
318 of_property_read_string(np, "clock-output-names", &name); in of_at91rm9200_clk_main_setup()
332 CLK_OF_DECLARE(at91rm9200_clk_main, "atmel,at91rm9200-clk-main",
340 const char *name = np->name; in of_at91sam9x5_clk_main_setup()
355 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9x5_clk_main_setup()
364 CLK_OF_DECLARE(at91sam9x5_clk_main, "atmel,at91sam9x5-clk-main",
376 if (of_at91_get_clk_range(np, "atmel,clk-output-range", &characteristics->output)) in of_at91_clk_master_get_characteristics()
379 of_property_read_u32_array(np, "atmel,clk-divisors", in of_at91_clk_master_get_characteristics()
380 characteristics->divisors, 4); in of_at91_clk_master_get_characteristics()
382 characteristics->have_div3_pres = in of_at91_clk_master_get_characteristics()
383 of_property_read_bool(np, "atmel,master-clk-have-div3-pres"); in of_at91_clk_master_get_characteristics()
399 const char *name = np->name; in of_at91_clk_master_setup()
410 of_property_read_string(np, "clock-output-names", &name); in of_at91_clk_master_setup()
445 CLK_OF_DECLARE(at91rm9200_clk_master, "atmel,at91rm9200-clk-master",
452 CLK_OF_DECLARE(at91sam9x5_clk_master, "atmel,at91sam9x5-clk-master",
488 if (of_property_read_string(np, "clock-output-names", &name)) in of_at91_clk_periph_setup()
489 name = periphclknp->name; in of_at91_clk_periph_setup()
499 "atmel,clk-output-range", in of_at91_clk_periph_setup()
503 * mpddr_clk feed DDR controller and is enabled by in of_at91_clk_periph_setup()
504 * bootloader thus we need to keep it enabled in case in of_at91_clk_periph_setup()
507 if (!strcmp(periphclknp->name, "mpddr_clk")) in of_at91_clk_periph_setup()
532 CLK_OF_DECLARE(at91rm9200_clk_periph, "atmel,at91rm9200-clk-peripheral",
539 CLK_OF_DECLARE(at91sam9x5_clk_periph, "atmel,at91sam9x5-clk-peripheral",
556 if (of_at91_get_clk_range(np, "atmel,clk-input-range", &input)) in of_at91_clk_pll_get_characteristics()
559 if (of_property_read_u32(np, "#atmel,pll-clk-output-range-cells", in of_at91_clk_pll_get_characteristics()
566 if (!of_get_property(np, "atmel,pll-clk-output-ranges", &tmp)) in of_at91_clk_pll_get_characteristics()
593 "atmel,pll-clk-output-ranges", in of_at91_clk_pll_get_characteristics()
598 "atmel,pll-clk-output-ranges", in of_at91_clk_pll_get_characteristics()
607 "atmel,pll-clk-output-ranges", in of_at91_clk_pll_get_characteristics()
616 "atmel,pll-clk-output-ranges", in of_at91_clk_pll_get_characteristics()
622 characteristics->input = input; in of_at91_clk_pll_get_characteristics()
623 characteristics->num_output = num_output; in of_at91_clk_pll_get_characteristics()
624 characteristics->output = output; in of_at91_clk_pll_get_characteristics()
625 characteristics->out = out; in of_at91_clk_pll_get_characteristics()
626 characteristics->icpll = icpll; in of_at91_clk_pll_get_characteristics()
646 const char *name = np->name; in of_at91_clk_pll_setup()
655 of_property_read_string(np, "clock-output-names", &name); in of_at91_clk_pll_setup()
683 CLK_OF_DECLARE(at91rm9200_clk_pll, "atmel,at91rm9200-clk-pll",
690 CLK_OF_DECLARE(at91sam9g45_clk_pll, "atmel,at91sam9g45-clk-pll",
697 CLK_OF_DECLARE(at91sam9g20_clk_pllb, "atmel,at91sam9g20-clk-pllb",
704 CLK_OF_DECLARE(sama5d3_clk_pll, "atmel,sama5d3-clk-pll",
712 const char *name = np->name; in of_at91sam9x5_clk_plldiv_setup()
718 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9x5_clk_plldiv_setup()
732 CLK_OF_DECLARE(at91sam9x5_clk_plldiv, "atmel,at91sam9x5-clk-plldiv",
769 if (of_property_read_string(np, "clock-output-names", &name)) in of_at91_clk_prog_setup()
770 name = progclknp->name; in of_at91_clk_prog_setup()
786 CLK_OF_DECLARE(at91rm9200_clk_prog, "atmel,at91rm9200-clk-programmable",
793 CLK_OF_DECLARE(at91sam9g45_clk_prog, "atmel,at91sam9g45-clk-programmable",
800 CLK_OF_DECLARE(at91sam9x5_clk_prog, "atmel,at91sam9x5-clk-programmable",
808 const char *name = np->name; in of_at91sam9260_clk_slow_setup()
823 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9260_clk_slow_setup()
832 CLK_OF_DECLARE(at91sam9260_clk_slow, "atmel,at91sam9260-clk-slow",
843 const char *name = np->name; in of_at91sam9x5_clk_smd_setup()
853 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9x5_clk_smd_setup()
868 CLK_OF_DECLARE(at91sam9x5_clk_smd, "atmel,at91sam9x5-clk-smd",
898 if (of_property_read_string(np, "clock-output-names", &name)) in of_at91rm9200_clk_sys_setup()
899 name = sysclknp->name; in of_at91rm9200_clk_sys_setup()
904 * ddrck feeds DDR controller and is enabled by bootloader thus in of_at91rm9200_clk_sys_setup()
905 * we need to keep it enabled in case there is no Linux consumer in of_at91rm9200_clk_sys_setup()
908 if (!strcmp(sysclknp->name, "ddrck")) in of_at91rm9200_clk_sys_setup()
919 CLK_OF_DECLARE(at91rm9200_clk_sys, "atmel,at91rm9200-clk-system",
930 const char *name = np->name; in of_at91sam9x5_clk_usb_setup()
940 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9x5_clk_usb_setup()
955 CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
962 const char *name = np->name; in of_at91sam9n12_clk_usb_setup()
970 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9n12_clk_usb_setup()
984 CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
991 const char *name = np->name; in of_at91rm9200_clk_usb_setup()
1000 of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4); in of_at91rm9200_clk_usb_setup()
1004 of_property_read_string(np, "clock-output-names", &name); in of_at91rm9200_clk_usb_setup()
1017 CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
1026 const char *name = np->name; in of_at91sam9x5_clk_utmi_setup()
1032 of_property_read_string(np, "clock-output-names", &name); in of_at91sam9x5_clk_utmi_setup()
1043 * - 9x5: mainck supports several rates but it is indicated that a in of_at91sam9x5_clk_utmi_setup()
1045 * - sama5d3 and sama5d2: mainck supports several rates. Configuring in of_at91sam9x5_clk_utmi_setup()
1047 * - sama5d4: mainck is at 12 MHz. in of_at91sam9x5_clk_utmi_setup()
1051 regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d3-sfr"); in of_at91sam9x5_clk_utmi_setup()
1053 regmap_sfr = syscon_regmap_lookup_by_compatible("atmel,sama5d2-sfr"); in of_at91sam9x5_clk_utmi_setup()
1064 CLK_OF_DECLARE(at91sam9x5_clk_utmi, "atmel,at91sam9x5-clk-utmi",