drivers/ata/pata_sch.c

1 // SPDX-License-Identifier: GPL-2.0-only
3  *  pata_sch.c - Intel SCH PATA controllers
10  *    Intel SCH (AF82US15W, AF82US15L, AF82UL11L) chipsets -- see spec at:
31 	PM	= 0x07,		/* PIO Mode Bit Mask */
32 	MDM	= (0x03 << 8),	/* Multi-word DMA Mode Bit Mask */
33 	UDM	= (0x07 << 16), /* Ultra DMA Mode Bit Mask */
80 MODULE_DESCRIPTION("SCSI low-level driver for Intel SCH PATA controllers");
86  *	sch_set_piomode - Initialize host controller PATA PIO timings
90  *	Set PIO mode for device, in host controller PCI config space.
98 	unsigned int pio	= adev->pio_mode - XFER_PIO_0;  in sch_set_piomode()  local
99 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);  in sch_set_piomode()
100 	unsigned int port	= adev->devno ? D1TIM : D0TIM;  in sch_set_piomode()
105 	/* set PIO mode */  in sch_set_piomode()
107 	data |= pio;  in sch_set_piomode()
109 	if (adev->class == ATA_DEV_ATA)  in sch_set_piomode()
115  *	sch_set_dmamode - Initialize host controller PATA DMA timings
119  *	Set MW/UDMA mode for device, in host controller PCI config space.
127 	unsigned int dma_mode	= adev->dma_mode;  in sch_set_dmamode()
128 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);  in sch_set_dmamode()
129 	unsigned int port	= adev->devno ? D1TIM : D0TIM;  in sch_set_dmamode()
135 		/* enable Synchronous DMA mode */  in sch_set_dmamode()
138 		data |= (dma_mode - XFER_UDMA_0) << 16;  in sch_set_dmamode()
139 	} else { /* must be MWDMA mode, since we masked SWDMA already */  in sch_set_dmamode()
141 		data |= (dma_mode - XFER_MW_DMA_0) << 8;  in sch_set_dmamode()
147  *	sch_init_one - Register SCH ATA PCI device with kernel services
155  *	Zero on success, or -ERRNO value.
162 	ata_print_version_once(&pdev->dev, DRV_VERSION);  in sch_init_one()