1 // SPDX-License-Identifier: GPL-2.0-only
3  *    pata_efar.c - EFAR PIIX clone controller driver
6  *	(C) 2009-2010 Bartlomiej Zolnierkiewicz
11  *    Intel ICH controllers the EFAR widened the UDMA mode register bits
29  *	efar_pre_reset	-	Enable bits
43 	struct ata_port *ap = link->ap;  in efar_pre_reset()
44 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in efar_pre_reset()
46 	if (!pci_test_config_bits(pdev, &efar_enable_bits[ap->port_no]))  in efar_pre_reset()
47 		return -ENOENT;  in efar_pre_reset()
53  *	efar_cable_detect	-	check for 40/80 pin
62 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in efar_cable_detect()
66 	if (tmp & (2 >> ap->port_no))  in efar_cable_detect()
74  *	efar_set_piomode - Initialize host controller PATA PIO timings
78  *	Set PIO mode for device, in host controller PCI config space.
86 	unsigned int pio	= adev->pio_mode - XFER_PIO_0;  in efar_set_piomode()  local
87 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);  in efar_set_piomode()
88 	unsigned int master_port = ap->port_no ? 0x42 : 0x40;  in efar_set_piomode()
95 	 *	See Intel Document 298600-004 for the timing programing rules  in efar_set_piomode()
106 	if (pio > 1)  in efar_set_piomode()
108 	if (ata_pio_need_iordy(adev))	/* PIO 3/4 require IORDY */  in efar_set_piomode()
111 	if (adev->class == ATA_DEV_ATA)  in efar_set_piomode()
119 	if (adev->devno == 0) {  in efar_set_piomode()
122 		master_data |= (timings[pio][0] << 12) |  in efar_set_piomode()
123 			(timings[pio][1] << 8);  in efar_set_piomode()
125 		int shift = 4 * ap->port_no;  in efar_set_piomode()
133 		slave_data &= ap->port_no ? 0x0F : 0xF0;  in efar_set_piomode()
134 		slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift;  in efar_set_piomode()
142 	udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));  in efar_set_piomode()
148  *	efar_set_dmamode - Initialize host controller PATA DMA timings
152  *	Set UDMA/MWDMA mode for device, in host controller PCI config space.
160 	struct pci_dev *dev	= to_pci_dev(ap->host->dev);  in efar_set_dmamode()
161 	u8 master_port		= ap->port_no ? 0x42 : 0x40;  in efar_set_dmamode()
163 	u8 speed		= adev->dma_mode;  in efar_set_dmamode()
164 	int devid		= adev->devno + 2 * ap->port_no;  in efar_set_dmamode()
181 		unsigned int udma	= adev->dma_mode - XFER_UDMA_0;  in efar_set_dmamode()
186 		/* Load the UDMA mode number */  in efar_set_dmamode()
193 		 * MWDMA is driven by the PIO timings. We must also enable  in efar_set_dmamode()
195 		 * been set when the PIO timing was set.  in efar_set_dmamode()
197 		unsigned int mwdma	= adev->dma_mode - XFER_MW_DMA_0;  in efar_set_dmamode()
203 		int pio = needed_pio[mwdma] - XFER_PIO_0;  in efar_set_dmamode()  local
207 		/* If the drive MWDMA is faster than it can do PIO then  in efar_set_dmamode()
208 		   we must force PIO into PIO0 */  in efar_set_dmamode()
210 		if (adev->pio_mode < needed_pio[mwdma])  in efar_set_dmamode()
212 			control |= 8;	/* PIO cycles in PIO0 */  in efar_set_dmamode()
214 		if (adev->devno) {	/* Slave */  in efar_set_dmamode()
218 			slave_data &= ap->port_no ? 0x0F : 0xF0;  in efar_set_dmamode()
220 			slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);  in efar_set_dmamode()
227 				(timings[pio][0] << 12) |  in efar_set_dmamode()
228 				(timings[pio][1] << 8);  in efar_set_dmamode()
251  *	efar_init_one - Register EFAR ATA PCI device with kernel services
261  *	Zero on success, or -ERRNO value.
275 	ata_print_version_once(&pdev->dev, DRV_VERSION);  in efar_init_one()
301 MODULE_DESCRIPTION("SCSI low-level driver for EFAR PIIX clones");