61 	struct ccsr_ahci *reg_base;  member
167 	void __iomem *reg_base = hpriv->mmio;  in ahci_qoriq_phy_init()  local
175 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);  in ahci_qoriq_phy_init()
176 		writel(LS1021A_PORT_PHY2, reg_base + PORT_PHY2);  in ahci_qoriq_phy_init()
177 		writel(LS1021A_PORT_PHY3, reg_base + PORT_PHY3);  in ahci_qoriq_phy_init()
178 		writel(LS1021A_PORT_PHY4, reg_base + PORT_PHY4);  in ahci_qoriq_phy_init()
179 		writel(LS1021A_PORT_PHY5, reg_base + PORT_PHY5);  in ahci_qoriq_phy_init()
180 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);  in ahci_qoriq_phy_init()
183 					reg_base + LS1021A_AXICC_ADDR);  in ahci_qoriq_phy_init()
193 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);  in ahci_qoriq_phy_init()
194 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);  in ahci_qoriq_phy_init()
195 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);  in ahci_qoriq_phy_init()
196 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);  in ahci_qoriq_phy_init()
198 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);  in ahci_qoriq_phy_init()
202 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);  in ahci_qoriq_phy_init()
203 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);  in ahci_qoriq_phy_init()
204 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);  in ahci_qoriq_phy_init()
205 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);  in ahci_qoriq_phy_init()
207 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);  in ahci_qoriq_phy_init()
217 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);  in ahci_qoriq_phy_init()
218 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);  in ahci_qoriq_phy_init()
219 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);  in ahci_qoriq_phy_init()
220 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);  in ahci_qoriq_phy_init()
222 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);  in ahci_qoriq_phy_init()
234 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);  in ahci_qoriq_phy_init()
235 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);  in ahci_qoriq_phy_init()
236 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);  in ahci_qoriq_phy_init()
237 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);  in ahci_qoriq_phy_init()
239 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);  in ahci_qoriq_phy_init()
243 		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);  in ahci_qoriq_phy_init()
244 		writel(AHCI_PORT_PHY2_CFG, reg_base + PORT_PHY2);  in ahci_qoriq_phy_init()
245 		writel(AHCI_PORT_PHY3_CFG, reg_base + PORT_PHY3);  in ahci_qoriq_phy_init()
246 		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);  in ahci_qoriq_phy_init()
248 			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);  in ahci_qoriq_phy_init()