412 	struct acpi_iort_smmu_v3 *smmu;  in iort_get_id_mapping_index()  local
424 		smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in iort_get_id_mapping_index()
430 			if (smmu->event_gsiv && smmu->pri_gsiv &&  in iort_get_id_mapping_index()
431 			    smmu->gerr_gsiv && smmu->sync_gsiv)  in iort_get_id_mapping_index()
433 		} else if (!(smmu->flags & ACPI_IORT_SMMU_V3_DEVICEID_VALID)) {  in iort_get_id_mapping_index()
437 		if (smmu->id_mapping_index >= node->mapping_count) {  in iort_get_id_mapping_index()
443 		return smmu->id_mapping_index;  in iort_get_id_mapping_index()
888 			  struct acpi_iort_node *smmu,  in iort_get_rmrs()  argument
981 	struct acpi_iort_node *smmu = NULL;  in iort_node_get_rmr_info()  local
1032 	iort_get_rmrs(node, smmu, sids, num_sids, head);  in iort_node_get_rmr_info()
1093 		struct acpi_iort_smmu_v3 *smmu;  in iort_get_msi_resv_iommu()  local
1095 		smmu = (struct acpi_iort_smmu_v3 *)iommu->node_data;  in iort_get_msi_resv_iommu()
1096 		if (smmu->model == ACPI_IORT_SMMU_V3_HISILICON_HI161X)  in iort_get_msi_resv_iommu()
1453 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_count_resources()  local
1458 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_count_resources()
1460 	if (smmu->event_gsiv)  in arm_smmu_v3_count_resources()
1463 	if (smmu->pri_gsiv)  in arm_smmu_v3_count_resources()
1466 	if (smmu->gerr_gsiv)  in arm_smmu_v3_count_resources()
1469 	if (smmu->sync_gsiv)  in arm_smmu_v3_count_resources()
1475 static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu)  in arm_smmu_v3_is_combined_irq()  argument
1481 	if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)  in arm_smmu_v3_is_combined_irq()
1488 	return smmu->event_gsiv == smmu->pri_gsiv &&  in arm_smmu_v3_is_combined_irq()
1489 	       smmu->event_gsiv == smmu->gerr_gsiv &&  in arm_smmu_v3_is_combined_irq()
1490 	       smmu->event_gsiv == smmu->sync_gsiv;  in arm_smmu_v3_is_combined_irq()
1493 static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu)  in arm_smmu_v3_resource_size()  argument
1499 	if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX)  in arm_smmu_v3_resource_size()
1508 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_init_resources()  local
1512 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_init_resources()
1514 	res[num_res].start = smmu->base_address;  in arm_smmu_v3_init_resources()
1515 	res[num_res].end = smmu->base_address +  in arm_smmu_v3_init_resources()
1516 				arm_smmu_v3_resource_size(smmu) - 1;  in arm_smmu_v3_init_resources()
1520 	if (arm_smmu_v3_is_combined_irq(smmu)) {  in arm_smmu_v3_init_resources()
1521 		if (smmu->event_gsiv)  in arm_smmu_v3_init_resources()
1522 			acpi_iort_register_irq(smmu->event_gsiv, "combined",  in arm_smmu_v3_init_resources()
1527 		if (smmu->event_gsiv)  in arm_smmu_v3_init_resources()
1528 			acpi_iort_register_irq(smmu->event_gsiv, "eventq",  in arm_smmu_v3_init_resources()
1532 		if (smmu->pri_gsiv)  in arm_smmu_v3_init_resources()
1533 			acpi_iort_register_irq(smmu->pri_gsiv, "priq",  in arm_smmu_v3_init_resources()
1537 		if (smmu->gerr_gsiv)  in arm_smmu_v3_init_resources()
1538 			acpi_iort_register_irq(smmu->gerr_gsiv, "gerror",  in arm_smmu_v3_init_resources()
1542 		if (smmu->sync_gsiv)  in arm_smmu_v3_init_resources()
1543 			acpi_iort_register_irq(smmu->sync_gsiv, "cmdq-sync",  in arm_smmu_v3_init_resources()
1552 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_dma_configure()  local
1556 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_dma_configure()
1558 	attr = (smmu->flags & ACPI_IORT_SMMU_V3_COHACC_OVERRIDE) ?  in arm_smmu_v3_dma_configure()
1575 	struct acpi_iort_smmu_v3 *smmu;  in arm_smmu_v3_set_proximity()  local
1577 	smmu = (struct acpi_iort_smmu_v3 *)node->node_data;  in arm_smmu_v3_set_proximity()
1578 	if (smmu->flags & ACPI_IORT_SMMU_V3_PXM_VALID) {  in arm_smmu_v3_set_proximity()
1579 		int dev_node = pxm_to_node(smmu->pxm);  in arm_smmu_v3_set_proximity()
1586 			smmu->base_address,  in arm_smmu_v3_set_proximity()
1587 			smmu->pxm);  in arm_smmu_v3_set_proximity()
1597 	struct acpi_iort_smmu *smmu;  in arm_smmu_count_resources()  local
1600 	smmu = (struct acpi_iort_smmu *)node->node_data;  in arm_smmu_count_resources()
1610 	return smmu->context_interrupt_count + 2;  in arm_smmu_count_resources()
1616 	struct acpi_iort_smmu *smmu;  in arm_smmu_init_resources()  local
1621 	smmu = (struct acpi_iort_smmu *)node->node_data;  in arm_smmu_init_resources()
1623 	res[num_res].start = smmu->base_address;  in arm_smmu_init_resources()
1624 	res[num_res].end = smmu->base_address + smmu->span - 1;  in arm_smmu_init_resources()
1628 	glb_irq = ACPI_ADD_PTR(u64, node, smmu->global_interrupt_offset);  in arm_smmu_init_resources()
1637 	ctx_irq = ACPI_ADD_PTR(u64, node, smmu->context_interrupt_offset);  in arm_smmu_init_resources()
1638 	for (i = 0; i < smmu->context_interrupt_count; i++) {  in arm_smmu_init_resources()
1650 	struct acpi_iort_smmu *smmu;  in arm_smmu_dma_configure()  local
1654 	smmu = (struct acpi_iort_smmu *)node->node_data;  in arm_smmu_dma_configure()
1656 	attr = (smmu->flags & ACPI_IORT_SMMU_COHERENT_WALK) ?  in arm_smmu_dma_configure()