Lines Matching +full:static +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-2023 Intel Corporation
68 #define BUTTRESS_IRQ_DISABLE_MASK ((u32)-1)
78 static char *ivpu_platform_to_str(u32 platform) in ivpu_platform_to_str()
92 static const struct dmi_system_id ivpu_dmi_platform_simulation[] = {
110 static void ivpu_hw_read_platform(struct ivpu_device *vdev) in ivpu_hw_read_platform()
113 vdev->platform = IVPU_PLATFORM_SIMICS; in ivpu_hw_read_platform()
115 vdev->platform = IVPU_PLATFORM_SILICON; in ivpu_hw_read_platform()
118 ivpu_platform_to_str(vdev->platform), vdev->platform); in ivpu_hw_read_platform()
121 static void ivpu_hw_wa_init(struct ivpu_device *vdev) in ivpu_hw_wa_init()
123 vdev->wa.punit_disabled = ivpu_is_fpga(vdev); in ivpu_hw_wa_init()
124 vdev->wa.clear_runtime_mem = false; in ivpu_hw_wa_init()
127 vdev->wa.disable_clock_relinquish = true; in ivpu_hw_wa_init()
134 static void ivpu_hw_timeouts_init(struct ivpu_device *vdev) in ivpu_hw_timeouts_init()
137 vdev->timeout.boot = 100000; in ivpu_hw_timeouts_init()
138 vdev->timeout.jsm = 50000; in ivpu_hw_timeouts_init()
139 vdev->timeout.tdr = 2000000; in ivpu_hw_timeouts_init()
140 vdev->timeout.reschedule_suspend = 1000; in ivpu_hw_timeouts_init()
142 vdev->timeout.boot = 50; in ivpu_hw_timeouts_init()
143 vdev->timeout.jsm = 500; in ivpu_hw_timeouts_init()
144 vdev->timeout.tdr = 10000; in ivpu_hw_timeouts_init()
145 vdev->timeout.reschedule_suspend = 10; in ivpu_hw_timeouts_init()
147 vdev->timeout.boot = 1000; in ivpu_hw_timeouts_init()
148 vdev->timeout.jsm = 500; in ivpu_hw_timeouts_init()
149 vdev->timeout.tdr = 2000; in ivpu_hw_timeouts_init()
150 vdev->timeout.reschedule_suspend = 10; in ivpu_hw_timeouts_init()
154 static int ivpu_pll_wait_for_cmd_send(struct ivpu_device *vdev) in ivpu_pll_wait_for_cmd_send()
159 static int ivpu_pll_cmd_send(struct ivpu_device *vdev, u16 min_ratio, u16 max_ratio, in ivpu_pll_cmd_send()
197 static int ivpu_pll_wait_for_status_ready(struct ivpu_device *vdev) in ivpu_pll_wait_for_status_ready()
202 static int ivpu_wait_for_clock_own_resource_ack(struct ivpu_device *vdev) in ivpu_wait_for_clock_own_resource_ack()
210 static void ivpu_pll_init_frequency_ratios(struct ivpu_device *vdev) in ivpu_pll_init_frequency_ratios()
212 struct ivpu_hw_info *hw = vdev->hw; in ivpu_pll_init_frequency_ratios()
223 hw->pll.min_ratio = clamp_t(u8, ivpu_pll_min_ratio, fuse_min_ratio, fuse_max_ratio); in ivpu_pll_init_frequency_ratios()
224 hw->pll.max_ratio = clamp_t(u8, ivpu_pll_max_ratio, hw->pll.min_ratio, fuse_max_ratio); in ivpu_pll_init_frequency_ratios()
225 hw->pll.pn_ratio = clamp_t(u8, fuse_pn_ratio, hw->pll.min_ratio, hw->pll.max_ratio); in ivpu_pll_init_frequency_ratios()
228 static int ivpu_pll_drive(struct ivpu_device *vdev, bool enable) in ivpu_pll_drive() argument
230 u16 config = enable ? PLL_CONFIG_DEFAULT : 0; in ivpu_pll_drive()
231 u16 cdyn = enable ? PLL_CDYN_DEFAULT : 0; in ivpu_pll_drive()
232 u16 epp = enable ? PLL_EPP_DEFAULT : 0; in ivpu_pll_drive()
233 struct ivpu_hw_info *hw = vdev->hw; in ivpu_pll_drive()
234 u16 target_ratio = hw->pll.pn_ratio; in ivpu_pll_drive()
240 ret = ivpu_pll_cmd_send(vdev, hw->pll.min_ratio, hw->pll.max_ratio, in ivpu_pll_drive()
247 if (enable) { in ivpu_pll_drive()
258 static int ivpu_pll_enable(struct ivpu_device *vdev) in ivpu_pll_enable()
263 static int ivpu_pll_disable(struct ivpu_device *vdev) in ivpu_pll_disable()
268 static void ivpu_boot_host_ss_rst_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_host_ss_rst_drive() argument
272 if (enable) { in ivpu_boot_host_ss_rst_drive()
285 static void ivpu_boot_host_ss_clk_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_host_ss_clk_drive() argument
289 if (enable) { in ivpu_boot_host_ss_clk_drive()
302 static int ivpu_boot_noc_qreqn_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_noc_qreqn_check()
307 return -EIO; in ivpu_boot_noc_qreqn_check()
312 static int ivpu_boot_noc_qacceptn_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_noc_qacceptn_check()
317 return -EIO; in ivpu_boot_noc_qacceptn_check()
322 static int ivpu_boot_noc_qdeny_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_noc_qdeny_check()
327 return -EIO; in ivpu_boot_noc_qdeny_check()
332 static int ivpu_boot_top_noc_qrenqn_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_top_noc_qrenqn_check()
338 return -EIO; in ivpu_boot_top_noc_qrenqn_check()
343 static int ivpu_boot_top_noc_qacceptn_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_top_noc_qacceptn_check()
349 return -EIO; in ivpu_boot_top_noc_qacceptn_check()
354 static int ivpu_boot_top_noc_qdeny_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_top_noc_qdeny_check()
360 return -EIO; in ivpu_boot_top_noc_qdeny_check()
365 static void ivpu_boot_idle_gen_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_idle_gen_drive() argument
369 if (enable) in ivpu_boot_idle_gen_drive()
377 static int ivpu_boot_host_ss_check(struct ivpu_device *vdev) in ivpu_boot_host_ss_check()
400 static int ivpu_boot_host_ss_axi_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_host_ss_axi_drive() argument
406 if (enable) in ivpu_boot_host_ss_axi_drive()
412 ret = ivpu_boot_noc_qacceptn_check(vdev, enable ? 0x1 : 0x0); in ivpu_boot_host_ss_axi_drive()
424 if (enable) { in ivpu_boot_host_ss_axi_drive()
432 static int ivpu_boot_host_ss_axi_enable(struct ivpu_device *vdev) in ivpu_boot_host_ss_axi_enable()
437 static int ivpu_boot_host_ss_top_noc_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_host_ss_top_noc_drive() argument
443 if (enable) { in ivpu_boot_host_ss_top_noc_drive()
452 ret = ivpu_boot_top_noc_qacceptn_check(vdev, enable ? 0x1 : 0x0); in ivpu_boot_host_ss_top_noc_drive()
465 static int ivpu_boot_host_ss_top_noc_enable(struct ivpu_device *vdev) in ivpu_boot_host_ss_top_noc_enable()
470 static void ivpu_boot_pwr_island_trickle_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_pwr_island_trickle_drive() argument
474 if (enable) in ivpu_boot_pwr_island_trickle_drive()
481 if (enable) in ivpu_boot_pwr_island_trickle_drive()
485 static void ivpu_boot_pwr_island_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_pwr_island_drive() argument
489 if (enable) in ivpu_boot_pwr_island_drive()
496 if (!enable) in ivpu_boot_pwr_island_drive()
500 static int ivpu_boot_wait_for_pwr_island_status(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_wait_for_pwr_island_status()
509 static void ivpu_boot_pwr_island_isolation_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_pwr_island_isolation_drive() argument
513 if (enable) in ivpu_boot_pwr_island_isolation_drive()
521 static void ivpu_boot_no_snoop_enable(struct ivpu_device *vdev) in ivpu_boot_no_snoop_enable()
532 static void ivpu_boot_tbu_mmu_enable(struct ivpu_device *vdev) in ivpu_boot_tbu_mmu_enable()
546 static int ivpu_boot_cpu_noc_qacceptn_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_cpu_noc_qacceptn_check()
551 return -EIO; in ivpu_boot_cpu_noc_qacceptn_check()
556 static int ivpu_boot_cpu_noc_qdeny_check(struct ivpu_device *vdev, u32 exp_val) in ivpu_boot_cpu_noc_qdeny_check()
561 return -EIO; in ivpu_boot_cpu_noc_qdeny_check()
566 static int ivpu_boot_pwr_domain_enable(struct ivpu_device *vdev) in ivpu_boot_pwr_domain_enable()
598 static int ivpu_boot_soc_cpu_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_soc_cpu_drive() argument
604 if (enable) in ivpu_boot_soc_cpu_drive()
610 ret = ivpu_boot_cpu_noc_qacceptn_check(vdev, enable ? 0x1 : 0x0); in ivpu_boot_soc_cpu_drive()
623 static int ivpu_boot_soc_cpu_enable(struct ivpu_device *vdev) in ivpu_boot_soc_cpu_enable()
628 static int ivpu_boot_soc_cpu_boot(struct ivpu_device *vdev) in ivpu_boot_soc_cpu_boot()
636 ivpu_err(vdev, "Failed to enable SOC CPU: %d\n", ret); in ivpu_boot_soc_cpu_boot()
640 val64 = vdev->fw->entry_point; in ivpu_boot_soc_cpu_boot()
641 val64 <<= ffs(VPU_40XX_HOST_SS_VERIFICATION_ADDRESS_LO_IMAGE_LOCATION_MASK) - 1; in ivpu_boot_soc_cpu_boot()
654 static int ivpu_boot_d0i3_drive(struct ivpu_device *vdev, bool enable) in ivpu_boot_d0i3_drive() argument
666 if (enable) in ivpu_boot_d0i3_drive()
681 static bool ivpu_tile_disable_check(u32 config) in ivpu_tile_disable_check()
683 /* Allowed values: 0 or one bit from range 0-5 (6 tiles) */ in ivpu_tile_disable_check()
687 if (config > BIT(TILE_MAX_NUM - 1)) in ivpu_tile_disable_check()
690 if ((config & (config - 1)) == 0) in ivpu_tile_disable_check()
696 static int ivpu_hw_40xx_info_init(struct ivpu_device *vdev) in ivpu_hw_40xx_info_init()
698 struct ivpu_hw_info *hw = vdev->hw; in ivpu_hw_40xx_info_init()
705 return -EIO; in ivpu_hw_40xx_info_init()
711 return -EIO; in ivpu_hw_40xx_info_init()
716 TILE_MAX_NUM - 1, ffs(tile_disable) - 1); in ivpu_hw_40xx_info_init()
720 hw->tile_fuse = tile_disable; in ivpu_hw_40xx_info_init()
721 hw->pll.profiling_freq = PLL_PROFILING_FREQ_DEFAULT; in ivpu_hw_40xx_info_init()
725 ivpu_hw_init_range(&vdev->hw->ranges.global, 0x80000000, SZ_512M); in ivpu_hw_40xx_info_init()
726 ivpu_hw_init_range(&vdev->hw->ranges.user, 0x80000000, SZ_256M); in ivpu_hw_40xx_info_init()
727 ivpu_hw_init_range(&vdev->hw->ranges.shave, 0x80000000 + SZ_256M, SZ_2G - SZ_256M); in ivpu_hw_40xx_info_init()
728 ivpu_hw_init_range(&vdev->hw->ranges.dma, 0x200000000, SZ_8G); in ivpu_hw_40xx_info_init()
737 static int ivpu_hw_40xx_reset(struct ivpu_device *vdev) in ivpu_hw_40xx_reset()
759 static int ivpu_hw_40xx_d0i3_enable(struct ivpu_device *vdev) in ivpu_hw_40xx_d0i3_enable()
768 ivpu_err(vdev, "Failed to enable D0i3: %d\n", ret); in ivpu_hw_40xx_d0i3_enable()
775 static int ivpu_hw_40xx_d0i3_disable(struct ivpu_device *vdev) in ivpu_hw_40xx_d0i3_disable()
789 static void ivpu_hw_40xx_profiling_freq_reg_set(struct ivpu_device *vdev) in ivpu_hw_40xx_profiling_freq_reg_set()
793 if (vdev->hw->pll.profiling_freq == PLL_PROFILING_FREQ_DEFAULT) in ivpu_hw_40xx_profiling_freq_reg_set()
801 static void ivpu_hw_40xx_ats_print(struct ivpu_device *vdev) in ivpu_hw_40xx_ats_print()
804 REGB_RD32(VPU_40XX_BUTTRESS_HM_ATS) ? "Enable" : "Disable"); in ivpu_hw_40xx_ats_print()
807 static void ivpu_hw_40xx_clock_relinquish_disable(struct ivpu_device *vdev) in ivpu_hw_40xx_clock_relinquish_disable()
815 static int ivpu_hw_40xx_power_up(struct ivpu_device *vdev) in ivpu_hw_40xx_power_up()
831 ivpu_err(vdev, "Failed to enable PLL: %d\n", ret); in ivpu_hw_40xx_power_up()
850 ivpu_err(vdev, "Failed to enable power domain: %d\n", ret); in ivpu_hw_40xx_power_up()
856 ivpu_err(vdev, "Failed to enable AXI: %d\n", ret); in ivpu_hw_40xx_power_up()
862 ivpu_err(vdev, "Failed to enable TOP NOC: %d\n", ret); in ivpu_hw_40xx_power_up()
867 static int ivpu_hw_40xx_boot_fw(struct ivpu_device *vdev) in ivpu_hw_40xx_boot_fw()
881 static bool ivpu_hw_40xx_is_idle(struct ivpu_device *vdev) in ivpu_hw_40xx_is_idle()
893 static int ivpu_hw_40xx_power_down(struct ivpu_device *vdev) in ivpu_hw_40xx_power_down()
902 ret = -EIO; in ivpu_hw_40xx_power_down()
907 ret = -EIO; in ivpu_hw_40xx_power_down()
913 static void ivpu_hw_40xx_wdt_disable(struct ivpu_device *vdev) in ivpu_hw_40xx_wdt_disable()
929 static u32 ivpu_hw_40xx_reg_pll_freq_get(struct ivpu_device *vdev) in ivpu_hw_40xx_reg_pll_freq_get()
939 static u32 ivpu_hw_40xx_reg_telemetry_offset_get(struct ivpu_device *vdev) in ivpu_hw_40xx_reg_telemetry_offset_get()
944 static u32 ivpu_hw_40xx_reg_telemetry_size_get(struct ivpu_device *vdev) in ivpu_hw_40xx_reg_telemetry_size_get()
949 static u32 ivpu_hw_40xx_reg_telemetry_enable_get(struct ivpu_device *vdev) in ivpu_hw_40xx_reg_telemetry_enable_get()
954 static void ivpu_hw_40xx_reg_db_set(struct ivpu_device *vdev, u32 db_id) in ivpu_hw_40xx_reg_db_set()
956 u32 reg_stride = VPU_40XX_CPU_SS_DOORBELL_1 - VPU_40XX_CPU_SS_DOORBELL_0; in ivpu_hw_40xx_reg_db_set()
962 static u32 ivpu_hw_40xx_reg_ipc_rx_addr_get(struct ivpu_device *vdev) in ivpu_hw_40xx_reg_ipc_rx_addr_get()
967 static u32 ivpu_hw_40xx_reg_ipc_rx_count_get(struct ivpu_device *vdev) in ivpu_hw_40xx_reg_ipc_rx_count_get()
974 static void ivpu_hw_40xx_reg_ipc_tx_set(struct ivpu_device *vdev, u32 vpu_addr) in ivpu_hw_40xx_reg_ipc_tx_set()
979 static void ivpu_hw_40xx_irq_clear(struct ivpu_device *vdev) in ivpu_hw_40xx_irq_clear()
984 static void ivpu_hw_40xx_irq_enable(struct ivpu_device *vdev) in ivpu_hw_40xx_irq_enable()
992 static void ivpu_hw_40xx_irq_disable(struct ivpu_device *vdev) in ivpu_hw_40xx_irq_disable()
1000 static void ivpu_hw_40xx_irq_wdt_nce_handler(struct ivpu_device *vdev) in ivpu_hw_40xx_irq_wdt_nce_handler()
1006 static void ivpu_hw_40xx_irq_wdt_mss_handler(struct ivpu_device *vdev) in ivpu_hw_40xx_irq_wdt_mss_handler()
1012 static void ivpu_hw_40xx_irq_noc_firewall_handler(struct ivpu_device *vdev) in ivpu_hw_40xx_irq_noc_firewall_handler()
1018 static irqreturn_t ivpu_hw_40xx_irqv_handler(struct ivpu_device *vdev, int irq) in ivpu_hw_40xx_irqv_handler()
1053 static irqreturn_t ivpu_hw_40xx_irqb_handler(struct ivpu_device *vdev, int irq) in ivpu_hw_40xx_irqb_handler()
1114 static irqreturn_t ivpu_hw_40xx_irq_handler(int irq, void *ptr) in ivpu_hw_40xx_irq_handler()
1124 /* Re-enable global interrupts to re-trigger MSI for pending interrupts */ in ivpu_hw_40xx_irq_handler()
1133 static void ivpu_hw_40xx_diagnose_failure(struct ivpu_device *vdev) in ivpu_hw_40xx_diagnose_failure()