Lines Matching refs:dec_bit
4326 u32 timeout_usec, dec_id, dec_bit, offset, graceful; in gaudi2_stop_dcore_dec() local
4335 dec_bit = dcore_id * NUM_OF_DEC_PER_DCORE + dec_id; in gaudi2_stop_dcore_dec()
4336 if (!(hdev->asic_prop.decoder_enabled_mask & BIT(dec_bit))) in gaudi2_stop_dcore_dec()
4366 u32 timeout_usec, dec_id, dec_bit, offset, graceful; in gaudi2_stop_pcie_dec() local
4375 dec_bit = PCIE_DEC_SHIFT + dec_id; in gaudi2_stop_pcie_dec()
4376 if (!(hdev->asic_prop.decoder_enabled_mask & BIT(dec_bit))) in gaudi2_stop_pcie_dec()
5422 u32 dcore_id, dec_id, dec_bit; in gaudi2_init_dec() local
5433 dec_bit = dcore_id * NUM_OF_DEC_PER_DCORE + dec_id; in gaudi2_init_dec()
5435 if (!(hdev->asic_prop.decoder_enabled_mask & BIT(dec_bit))) in gaudi2_init_dec()
5443 gaudi2_init_vdec_brdg_ctrl(hdev, base_addr, dec_bit); in gaudi2_init_dec()
5445 gaudi2->dec_hw_cap_initialized |= BIT_ULL(HW_CAP_DEC_SHIFT + dec_bit); in gaudi2_init_dec()
5449 dec_bit = PCIE_DEC_SHIFT + dec_id; in gaudi2_init_dec()
5450 if (!(hdev->asic_prop.decoder_enabled_mask & BIT(dec_bit))) in gaudi2_init_dec()
5456 gaudi2_init_vdec_brdg_ctrl(hdev, base_addr, dec_bit); in gaudi2_init_dec()
5458 gaudi2->dec_hw_cap_initialized |= BIT_ULL(HW_CAP_DEC_SHIFT + dec_bit); in gaudi2_init_dec()