2139 	int dcore, inst, tpc_seq;  in gaudi2_iterate_tpcs()  local
2145 	for (dcore = 0; dcore < NUM_OF_DCORES; dcore++) {  in gaudi2_iterate_tpcs()
2147 			tpc_seq = dcore * NUM_OF_TPC_PER_DCORE + inst;  in gaudi2_iterate_tpcs()
2152 			offset = (DCORE_OFFSET * dcore) + (DCORE_TPC_OFFSET * inst);  in gaudi2_iterate_tpcs()
2154 			ctx->fn(hdev, dcore, inst, offset, ctx);  in gaudi2_iterate_tpcs()
2157 							dcore, inst);  in gaudi2_iterate_tpcs()
3749 	int dcore, inst;  in gaudi2_stop_dma_qmans()  local
3762 	for (dcore = 0 ; dcore < NUM_OF_DCORES ; dcore++) {  in gaudi2_stop_dma_qmans()
3764 			u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;  in gaudi2_stop_dma_qmans()
3770 			qm_base = mmDCORE0_EDMA0_QM_BASE + dcore * DCORE_OFFSET +  in gaudi2_stop_dma_qmans()
3861 	int dcore, inst;  in gaudi2_dma_stall()  local
3873 	for (dcore = 0 ; dcore < NUM_OF_DCORES ; dcore++) {  in gaudi2_dma_stall()
3875 			u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;  in gaudi2_dma_stall()
3881 			core_base = mmDCORE0_EDMA0_CORE_BASE + dcore * DCORE_OFFSET +  in gaudi2_dma_stall()
3949 	int dcore, inst;  in gaudi2_disable_dma_qmans()  local
3961 	for (dcore = 0 ; dcore < NUM_OF_DCORES ; dcore++) {  in gaudi2_disable_dma_qmans()
3963 			u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;  in gaudi2_disable_dma_qmans()
3969 			qm_base = mmDCORE0_EDMA0_QM_BASE + dcore * DCORE_OFFSET +  in gaudi2_disable_dma_qmans()
5096 	int dcore, inst;  in gaudi2_init_edma()  local
5101 	for (dcore = 0 ; dcore < NUM_OF_DCORES ; dcore++) {  in gaudi2_init_edma()
5103 			u8 seq = dcore * NUM_OF_EDMA_PER_DCORE + inst;  in gaudi2_init_edma()
5344 static void gaudi2_init_tpc_config(struct hl_device *hdev, int dcore, int inst,  in gaudi2_init_tpc_config()  argument
5352 	queue_id_base = cfg_data->dcore_tpc_qid_base[dcore] + (inst * NUM_OF_PQ_PER_QMAN);  in gaudi2_init_tpc_config()
5354 	if (dcore == 0 && inst == (NUM_DCORE0_TPC - 1))  in gaudi2_init_tpc_config()
5358 		seq = dcore * NUM_OF_TPC_PER_DCORE + inst;  in gaudi2_init_tpc_config()
7192 static void gaudi2_is_tpc_engine_idle(struct hl_device *hdev, int dcore, int inst, u32 offset,  in gaudi2_is_tpc_engine_idle()  argument
7200 	if ((dcore == 0) && (inst == (NUM_DCORE0_TPC - 1)))  in gaudi2_is_tpc_engine_idle()
7204 				dcore * GAUDI2_ENGINE_ID_DCORE_OFFSET + inst;  in gaudi2_is_tpc_engine_idle()
7220 					idle_data->tpc_fmt, dcore, inst,  in gaudi2_is_tpc_engine_idle()
7657 static void gaudi2_tpc_mmu_prepare(struct hl_device *hdev, int dcore, int inst,	u32 offset,  in gaudi2_tpc_mmu_prepare()  argument
8980 	u8 dcore, index_in_dcore;  in get_hmmu_base()  local
8985 		dcore = 0;  in get_hmmu_base()
8990 		dcore = 1;  in get_hmmu_base()
8995 		dcore = 0;  in get_hmmu_base()
9000 		dcore = 1;  in get_hmmu_base()
9005 		dcore = 3;  in get_hmmu_base()
9010 		dcore = 2;  in get_hmmu_base()
9015 		dcore = 3;  in get_hmmu_base()
9020 		dcore = 2;  in get_hmmu_base()
9025 		dcore = 0;  in get_hmmu_base()
9030 		dcore = 1;  in get_hmmu_base()
9035 		dcore = 0;  in get_hmmu_base()
9040 		dcore = 1;  in get_hmmu_base()
9045 		dcore = 3;  in get_hmmu_base()
9050 		dcore = 2;  in get_hmmu_base()
9055 		dcore = 3;  in get_hmmu_base()
9060 		dcore = 2;  in get_hmmu_base()
9067 	return mmDCORE0_HMMU0_MMU_BASE + dcore * DCORE_OFFSET + index_in_dcore * DCORE_HMMU_OFFSET;  in get_hmmu_base()
9964 	u32 chunk_size, dcore, edma_idx, sob_offset, sob_addr, comp_val,  in gaudi2_memset_device_memory()  local
10001 	for (dcore = 0 ; dcore < NUM_OF_DCORES ; dcore++) {  in gaudi2_memset_device_memory()
10003 			u32 edma_offset = dcore * DCORE_OFFSET + edma_idx * DCORE_EDMA_OFFSET;  in gaudi2_memset_device_memory()
10004 			u32 edma_bit = dcore * NUM_OF_EDMA_PER_DCORE + edma_idx;  in gaudi2_memset_device_memory()
10018 					edma_queues_id[dcore] + 4 * edma_idx, true);  in gaudi2_memset_device_memory()
10025 		for (dcore = 0 ; dcore < NUM_OF_DCORES ; dcore++) {  in gaudi2_memset_device_memory()
10027 				u32 edma_bit = dcore * NUM_OF_EDMA_PER_DCORE + edma_idx;  in gaudi2_memset_device_memory()
10037 					edma_queues_id[dcore] + edma_idx * 4,  in gaudi2_memset_device_memory()
10056 	for (dcore = 0 ; dcore < NUM_OF_DCORES ; dcore++) {  in gaudi2_memset_device_memory()
10058 			u32 edma_offset = dcore * DCORE_OFFSET + edma_idx * DCORE_EDMA_OFFSET;  in gaudi2_memset_device_memory()
10059 			u32 edma_bit = dcore * NUM_OF_EDMA_PER_DCORE + edma_idx;  in gaudi2_memset_device_memory()
10069 					edma_queues_id[dcore] + 4 * edma_idx, false);  in gaudi2_memset_device_memory()